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SETTING
Above 4G Decoding
PCI Latency Timer
VGA Palette Snoop
PERR# Generation
SERR# Generation
IV32 Motherboard User Manual
Enables or Disables 64 bit capable devices to be decoded in above 4G address
space
Value to be programmed into PCI Latency Timer Register.(32~248)
Enables or Disables VGA palette registers snooping
Enables or Disables PCI device to generate PERR#
Enables or Disables PCI device to generate SERR#
DESCRIPTION
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