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Chapter 1. Introduction
This chapter gives an overview of the processor and the BladeCenter QS20.
The BladeCenter QS20
The high performance BladeCenter QS20 is based on the 64 bit Cell Broadband
Engine
supported per blade and are directly mounted on the blade planar board to provide
multiprocessing capability. Each processor includes 32/32 KB L1 (data/instruction)
and 512 KB L2 cache.
The Cell BE implementation of the broadband processor architecture (CBEA)
includes one PowerPC
processing cores (SPE). Each SPE core includes one synergistic processing unit
(SPU) with its own local storage (LS) area, and one dedicated memory flow
controller (MFC), which has an associated memory management unit (MMU) to hold
and process memory protection and access permission information. To facilitate
data flow on-chip and externally, the Cell BE also implements the broadband engine
bus and other I/O structures.
There is a highspeed RAMBUS interface to the processor, a 4x PCI-Express
channel, a 32bit/33MHZ PCI bus interface, which is specified to attach the PATA
controller to the board, 1 Gigabit Ethernet MAC, a UART and an external bus
controller. Attached to the external bus are a Flash EPROM device (8 Mbyte), 1 MB
of battery-backed NVRAM and battery-backed RTC.
The local service processor supports environmental monitoring, front panel, chip
initialization and the Management Module interface.
To ensure compatibility with existing blades, the BladeCenter QS20 provides two
midplane connectors. These connectors contain Gigabit Ethernet links, power and a
chassis management bus. On-card VRMs generate all required voltages from the
12V bulk supply from the Blade midplane connection. The blade includes an IDE
hard disk (that can provide a boot mechanism for an operating system), and
optional BladeCenter QS20 InfiniBand 2945 Option daughter card (referred to as
InfiniBand card in this document) support. The BladeCenter QS20 operates in a
BladeCenter
For more information about the processor, see
http://www.ibm.com/developer/power/cell.
Figure 1 on page 2 shows a BladeCenter QS20.
© Copyright IBM Corp. 2005
TM
processor (Cell BE) with a frequency of 3.2 GHz. Two processors are
®
Processor Element (PPE) core and eight synergistic
®
(8677) chassis.
1
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