Atmel AT91SAM9261-EK User Manual page 28

8
EBI SDRAM INTERFACE
A[0..22]
D[0..31]
RAS
CAS
SDWE
D
SDA10
SDCKE
SDCK
CFIOR_NBS1_NWR1
CFIOW_NBS3_NWR3
SDCS_NCS1
C
D[0..31]
PC[0..15]
B
A
8
7 6
MN4 MN4
A2
23
A0
A3 MT48LC16M16A2 MT48LC16M16A2
24
A1
A4
25
A2
A5
26
A3
A6
29
A4
A7
30
A5
A8
31
A6
A9
32
A7
A10
33
A8
A11
34
A9
SDA10
22
A10
A13
35
A11
A16
BA0
20
BA0
A17
BA1 21
BA1
A14
36
A12
40
N.C
SDCKE
37
CKE
SDCK
38
CLK
NBS0
A0
15
DQML
CFIOR_NBS1_NWR1
39
DQMH
3V3
CAS
17
CAS
RAS
18
RAS
R18 R18 SDWE
16
WE
100K 100K
19
CS
256 Mbits
S10 S10
DUAL FOOTPRINT
3V3 16-bit bus width
MN6A MN6A
A21
16
CLE
A22
17
ALE
PC0
8
RE
PC1
18
WE
R19 R19 PC14
9
CE
100K 100K
PC15
7
R/B
WP
19
WP
S13 S13
1
N.C
2
N.C
3
N.C
4
N.C
5
N.C
6
N.C
10
N.C
11
N.C
14
N.C
15
N.C
20
N.C
21
N.C
22
N.C
23
N.C
24
N.C
34
N.C
35
N.C
NOT POPULATED
7 6
5 4
D0
2
DQ0
D1
4
DQ1
D2
5
DQ2
D3
7
DQ3
D4
8
DQ4
D5
10
DQ5
D6
11
DQ6
D7
13
DQ7
D8
42
DQ8
D9
44
DQ9
D10
45
DQ10
D11
47
DQ11
D12
48
DQ12
D13
50
DQ13
D14
51
DQ14
D15
53
DQ15
3V3
1
VDD
14
VDD
27
VDD
3
VDDQ
9
VDDQ
43
VDDQ
49
VDDQ
28
VSS
41
VSS
54
VSS
C50 C50 C51 C51 C52 C52 C53 C53
6
VSSQ
100NF 100NF 100NF 100NF 100NF 100NF 100NF 100NF
12
VSSQ
C44 C44 C45 C45 C46 C46
46
VSSQ
100NF 100NF 100NF 100NF 100NF 100NF
52
VSSQ
8-bit bus width
MN6B MN6B
D0 A21
26 16
I/O0 CLE I/O0
D1 A22
28 17
I/O1 ALE I/O1
D2 PC0
30 8
I/O2 RE I/O2
D3 PC1
32 18
I/O3 WE I/O3
D4 PC14
40 9
I/O4 CE I/O4
D5
42
I/O5 I/O5
D6 PC15
44 7
I/O6 R/B I/O6
D7
46
I/O7 I/O7
D8 WP
27 19
I/O8 WP
D9
29
I/O9 N.C
D10
31
I/O10 N.C
D11
33 1
I/O11 N.C N.C
D12
41 2
I/O12 N.C N.C
D13
43 3
I/O13 N.C N.C
D14
45 4
I/O14 N.C N.C
D15
47 5
I/O15 N.C PRE
6
N.C N.C
39 10
N.C N.C N.C
38 11
PRE N.C N.C
36 14
N.C N.C N.C
15
N.C N.C
3V3
20
N.C
37 21
VCC N.C VCC
12 22
VCC N.C VCC
C60 C60
23
N.C
100NF 100NF
48 24
VSS N.C
25 25
VSS N.C VSS
13 26
VSS N.C VSS
C59 C59
100NF 100NF
5 4
3
MN5 MN5
A2
23 2
A0 DQ0
A3 MT48LC16M16A2 MT48LC16M16A2
24 4
A1 DQ1
A4
25 5
A2 DQ2
A5
26 7
A3 DQ3
A6
29 8
A4 DQ4
A7
30 10
A5 DQ5
A8
31 11
A6 DQ6
A9
32 13
A7 DQ7
A10
33 42
A8 DQ8
A11
34 44
A9 DQ9
SDA10
22 45
A10 DQ10
A13
35 47
A11 DQ11
48
DQ12
A16
BA0
20 50
BA0 DQ13
A17
BA1 21 51
BA1 DQ14
53
DQ15
A14
36
A12
40 1
N.C VDD
14
VDD
SDCKE
37 27
CKE VDD
3
VDDQ
SDCK
38 9
CLK VDDQ
43
VDDQ
NBS2
A1
15 49
DQML VDDQ
CFIOW_NBS3_NWR3
39
DQMH
28
VSS
CAS
17 41
CAS VSS
RAS
18 54
RAS VSS
6
VSSQ
12
VSSQ
SDWE
16 46
WE VSSQ
19 52
CS VSSQ
256 Mbits
PA[0..31]
PA0 SPI0_MISO
D0 PA1 SPI0_MOSI
29
D1 PA2 SPI0_SPCK
30
D2 SPI0_NPCS0
31
D3
32
D4
41 3V3
D5
42
D6
43
R20 R20 100K 100K
D7
44
48
NRST
47
46 1
PA3
45 2
3V3
40 3
39
J21 J21 R72 R72
38
10K 10K
35
34
33
PA4 MCDA1
28
PA0 SPI0_MISO MCDA0
27
PA2 SPI0_SPCK MCCK
37
3V3
12
3V3
PA1 SPI0_MOSI MCCDA
PA6 SPI0_NPCS3 MCDA3
36
PA5 MCDA2
13
C115 C115
100NF 100NF
AT91SAM9261-EK AT91SAM9261-EK AT91SAM9261-EK
SDRAM & NANDFLASH SDRAM & NANDFLASH SDRAM & NANDFLASH
3
2 1
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
3V3
C54 C54 C55 C55 C56 C56 C57 C57
100NF 100NF 100NF 100NF 100NF 100NF 100NF 100NF
C47 C47 C48 C48 C49 C49
100NF 100NF 100NF 100NF 100NF 100NF
3V3
MN7 MN7
8 6
SO VCC
C58 C58
1
SI
100NF 100NF
2
SCK
4 7
CS GND
3 5
RESET WP
S12 S12
WRITE PROTECT
NORMALLY OPEN
SD CARD / MMC CARD
DATAFLASH CARD
INTERFACE
J22 J22
8
7
6
5
4
3
2
1
9
FPS009 FPS009
JPG JPG JPG 01/18/06 01/18/06 01/18/06
D D D
C C C JPG JPG JPG 14/09/05 14/09/05 14/09/05
B B B JPG JPG JPG 04/20/05 04/20/05 04/20/05
A A A INIT EDIT INIT EDIT INIT EDIT JPG JPG JPG 02/23/05 02/23/05 02/23/05 XXX XXX XXX XX/XX/05 XX/XX/05 XX/XX/05
REV REV REV MODIF. MODIF. MODIF. DES. DES. DES. DATE DATE DATE VER. VER. VER. DATE DATE DATE
SCALE SCALE SCALE REV. REV. REV. SHEET SHEET SHEET
1/1 1/1 1/1
3 3 3
D D D
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings. This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings. This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2 1
D
C
B
A
6 6 6