Atmel AT91SAM9261-EK User Manual page 14

Board Description
3-2
6198C–ATARM–15-Dec-06
– Remap Command
! Fully Featured System Controller (SYSC) for Efficient System Management, including
– Reset Controller, Shutdown Controller, Four 32-bit Battery Backup Registers
for a Total of 16 Bytes
– Clock Generator and Power Management Controller
– Advanced Interrupt Controller and Debug Unit
– Periodic Interval Timer, Watchdog Timer and Real-time Timer
– Three 32-bit PIO Controllers
! Reset Controller (RSTC)
– Based on Power-on Reset Cells, Reset Source Identification and Reset
Output Control
! Shutdown Controller (SHDWC)
– Programmable Shutdown Pin Control and Wake-up Circuitry
! Clock Generator (CKGR)
– 32.768 kHz Low-power Oscillator on Battery Backup Power Supply, Providing
a Permanent Slow Clock
– 3 to 20 MHz On-chip Oscillator and two PLLs
! Power Management Controller (PMC)
– Very Slow Clock
Optimization Capabilities
– Four Programmable External Clock Signals
! Advanced Interrupt Controller (AIC)
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– Three External Interrupt Sources and One Fast Interrupt Source, Spurious
Interrupt Protected
! Debug Unit (DBGU)
– 2-wire USART
Programmable ICE Access Prevention
! Periodic Interval Timer (PIT)
– 20-bit Interval Timer plus 12-bit Interval Counter
! Watchdog Timer (WDT)
– Key Protected, Programmable Only Once, Windowed 12-bit Counter, Running
at Slow Clock
! Real-Time Timer (RTT)
– 32-bit Free-running Backup Counter Running at Slow Clock
! Three 32-bit Parallel Input/Output Controllers (PIO) PIOA, PIOB and PIOC
– 96 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain, Pull-up Resistor and Synchronous
Output
! Nineteen Peripheral DMA (PDC) Channels
Operating Mode,
and Support for Debug
AT91SAM9261-EK Evaluation Board User Guide
Software Programmable
Communication
Power
Channel,