Table of Contents
Advertisement
Specifications and Characteristics
Characteristics
Characteristics
The characteristics are not specifications, but are included as additional
information.
Maximum State Clock Rate
Maximum Conventional Timing Rate
Maximum Transitional Timing Rate
Maximum Timing with Glitch Rate
Channel Count
2
Memory Depth
Supplemental Characteristics
Probes
Input Resistance
Input Capatiance
Minimum Voltage Swing
Threshold Range
State Analysis
State/Clock Qualifiers
Time Tag Resolution
3
Maximum Time Count Between States
Maximum State Tag Count
3
I
2Cha nnel count is doubled when
two
HP 16550A cards a re connected tog ether.
Full Channel
lOOMHz
250MHz
125.MHz
NIA
102/204
4K
100 KQ, ±2%
-8pF
Half Channel
lOOMHz
500 MHz
250 MHz
125MHz
511102
BK
500 mV, peak-to-peak
±
6.0 V, adjustable
in
50 mV increments
6
8ns
34 seconds
4.29 x 10
9
3
Maximum state clock rate with time or state tags on is 100 MHz. When all pods are assigned to a state or timing machine, time or state tags
halve the memory depth.
12-4
Advertisement
Table of Contents
