Table of Contents
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P
E
C
.
3060/V24
I
A
O
M
ATTON
LECTRONICS
O
NSTALLATION
ND
PERATIONS
ANUAL
102001UA
Contents
Channel Clocking............................................................................................................................... 1-1
Fallback Clocking............................................................................................................................... 1-1
Channel Interface .............................................................................................................................. 1-1
Anti-streaming.................................................................................................................................... 1-2
Channel Selection Modes ................................................................................................................. 1-3
Channel Tail Circuits ......................................................................................................................... 1-4
Interface Connections ....................................................................................................................... 1-4
Front Panel LEDs .............................................................................................................................. 1-4
Channel Enable / Disable Switches .................................................................................................. 1-4
Power Supply ..................................................................................................................................... 1-4
Power Connection ............................................................................................................................. 2-1
Factory Configuration Switch Settings .............................................................................................. 2-1
Disassembly ...................................................................................................................................... 2-2
Installation .......................................................................................................................................... 2-2
Equipment Grounding (SW21-8) ....................................................................................................... 2-2
RTS To CTS Delay (SW22-1,2,3) ..................................................................................................... 2-3
Anti-Streaming (SW21-1,2,3) ............................................................................................................ 2-3
Receive Data Mode (SW23-4) .......................................................................................................... 2-3
Control Turn-Off Delay in "DATA" Switching Mode (SW23-1,2) ...................................................... 2-4
Switch on Data / Control (SW25-1,2,3,4,5,6) .................................................................................... 2-4
Internal Baud Rates (SW22-4,5,6,7) ................................................................................................. 2-4
Fallback Clock Enable (SW-23-5) ..................................................................................................... 2-5
Fallback Clocking From Sub-Channel 6 (SW22-4,5,6) ..................................................................... 2-5
Fallback Mode Selection (SW23-6)................................................................................................... 2-5
TX Clock Source Selection (SW21-4,5,6) ......................................................................................... 2-5
TX Clock Pin Selection (SW21-7) ..................................................................................................... 2-5
RX Clock Source Selection (SW24-1,2,3) ........................................................................................ 2-6
Tail Circuit Buffers (SW22-8) ............................................................................................................ 2-6
Port DCE/DTE Selection (SW7 thru SW20) ..................................................................................... 2-6
Test Voltage Enable Pins 9 & 10 (JP4 & JP5) .................................................................................. 2-7
DTR / DSR Forced Active (JP6 thru JP12) ....................................................................................... 2-7
FACTORY Test Jumpers (JP1, JP2 and JP3) .................................................................................. 2-8
Typical Application ............................................................................................................................ A-1
Typical Tail Circuit Configuration ..................................................................................................... A-1
Interface Pins Supported .................................................................................................................. A-1
Master DTE / Sub-Channel DTE Interface Flow Diagram ............................................................... A-2
Master DTE / Sub-Channel DCE Interface Flow Diagram .............................................................. A-2
Master DCE / Sub-Channel DTE Interface Flow Diagram .............................................................. A-3
Master DCE / Sub-Channel DCE Interface Flow Diagram .............................................................. A-3
TECHNICAL SPECIFICATIONS ...................................................................................................... A-4
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