Ram Subsystem; I/Ochannel - IBM AT 5170 Technical Reference

RAM Subsystem
The system board's RAM subsystem starts at address 000000 of
the 16M address space.
It
is 512K of 128K-by-l-bit RAM
modules (type 1 system board) or 512K of 256K-by-l-bit RAM
~
modules (type 2 system board). Memory access time is 150
nanoseconds and the cycle time is 275 nanoseconds.
Memory refresh
requ~sts
one memory cycle every 15
microseconds through the timer/counter (channell). The RAM
initialization program performs the following functions:
• Initializes channel 1 of the timer/counter to the rate
generation mode, with a period of 15 microseconds.
• Performs a memory write operation to any memory location.
Note: The memory must be accessed or refreshed eight
times before it can be used.
I/O Channel
The I/O channel supports:
• I/O address space hex 100 to hex 3FF
• 24-bit memory addresses (16M)
• Selection of data accesses (either 8- or 16-bit)
• Interrupts
• DMA channels
• I/O wait-state generation
1-24 System Board