System Timers - IBM AT 5170 Technical Reference

System Timers
The system has three programmable timer/counters, Channels 0
through 2. They are controlled by an Intel 8254-2
Timer/Counter chip, and are defined as follows:
~
Channel 0 System Timer
GATE 0 Tied on
CLKINO 1.190 MHz OSC
CLKOUTO 8259A IRQ 0
Channell
Refresh Request Generator
GATE 1 Tied on
CLKIN 1 1.190 MHz OSC
CLKOUT 1 Request refresh cycle
Note: Channel 1 is programmed as a rate generator to
produce a IS-microsecond period signal.
Channel 2 Tone Generation for Speaker
GATE 2
Controlled by bit 0 of port hex 61, PPI bit
CLKIN2
1.190 MHz OSC
CLKOUT2 Used to drive the speaker
The 8254-2 Timer/Counter is a programmable interval
timer/counter that system programs treat as an arrangement of
four external I/O ports. Three ports are treated as counters; the
fourth is a control register for mode programming. The following
is a system-timer block diagram.
1-22 System Board