IBM AT 5170 Technical Reference page 437

r-.\
.~
~
•
Program interrupts are used for access to these functions.
This practice removes the absolute addressing from the
program. Only the interrupt number is required.
•
The coprocessor detects six different exception conditions
that can occur during instruction execution. If the
appropriate exception mask within the coprocessor is not set,
the coprocessor sets its error signal. This error signal
generates a hardware interrupt (interrupt 13) and causes the
, busy' signal to the coprocessor to be held in the busy state.
The 'busy' signal may be cleared by an 8-bit I/O Write
command to address hex FO with DO through D7 equal to O.
The power-on-self-test code in the system ROM enables
hardware IRQ 13 and sets up its vector to point to a routine
in ROM. The ROM routine clears the 'busy' signal latch
and then transfers control to the address pointed to by the
NMI interrupt vector. This allows code written for any IBM
Personal Computer to work on an IBM Personal Computer
AT. The NMI interrupt handler should read the
coprocessor's status to determine if the NMI was caused by
the coprocessor. If the interrupt was not generated by the
coprocessor, control should be passed to the original NMI
interrupt handler.
• Back to back I/O commands to the same I/O ports will not
permit enough recovery time for I/O chips. To ensure
enough time, a JMP SHORT $+2 must be inserted between
IN/OUT instructions to the same I/O chip.
Note:
MOV AL,AH type instruction does not allow
enough recovery time. An example of the correct
procedure follows:
OUT IO_ADD,AL
JMP SHORT $+2
MOV AL,AH
OUT IO_ADD,AL
•
In systems using the 80286 microprocessor, IRQ 9 is
redirected to INT hex OA (hardware IRQ 2). This insures
Compatibility 9-11