Direct Memory Access; Directmemory Access - IBM AT 5170 Technical Reference

Direct Memory Access
The system supports seven direct memory access (DMA)
channels. Two Intel 8237 A-5 DMA Controller chips are used,
~
with four channels for each chip. The DMA channels are
assigned as follows:
Controller 1 Controller 2
Ch
o -
Reserved
Ch
4 -
Cascade for Ctlr 1
Ch 1 - SOLC Ch 5 - Reserved
Ch 2 -
o
i skette ( IBM Ch 6 - Reserved
Personal Computer)
Ch 3 - Reserved Ch 7 - Reserved
DMA Channels
DMA controller 1 contains channels 0 through 3. These channels
support 8-bit data transfers between 8-bit I/O adapters and 8- or
16-bit system memory. Each channel can transfer data
throughout the 16M system-address space in 64K blocks.
The following figures show address generation for the DMA
channels.
Source OMA Page Registers Controller
Address
A23<---------->A16
A15<---------->AO
Address Generation for DMA Channels 0 through 3
Note: The addressing signal,
I
byte high enable
I
(BHE), is
generated by inverting address line AO.
System Board 1-9