Program Support - IBM AT 5170 Technical Reference

The following diagram is an example of the shared interrupt
hardware logic.
INT Q f-----~ Q
+5
ENA
>CLK
-Q
2.2K Ohms
-CLR
System
Cl o c k - - - + - - - - + - - - - - - - '
>'-_-4.-
IRQ
+5
Q
L....-_ _
---j >CLK
-Q
-CLR
-Global
R e a r m - - - - + - - - - - - - '
Shared Interrupt Logic Diagram
Program Support
During multitasking, tasks are constantly being activated and
deactivated in no particular order. The interrupt-sharing program
support described in this section provides for an orderly means to:
• Link a task's interrupt handler to a chain of interrupt
handlers
• Share the interrupt level while the task is active
• Unlink the interrupt handler from the chain when the task is
deactivated.
Linking
to
a Chain
Each newly activated task replaces the interrupt vector in low
memory with a pointer to its own interrupt handler. The old
1""'"'\
interrupt vector is used as a forward pointer (FPTR) and is stored
at a fixed offset from the new task's interrupt handler.
System Board 1-15