Samsung S5PC110 Manual page 167

Risc microprocessor
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S5PC110_UM
2.2.55.1 GPIO Interrupt Control Registers (GPA0_INT_CON, R/W, Address = 0xE020_0700)
GPA0_INT_CON
Reserved
GPA0_INT_CON[7]
Reserved
GPA0_INT_CON[6]
Reserved
GPA0_INT_CON[5]
Reserved
GPA0_INT_CON[4]
Reserved
GPA0_INT_CON[3]
Reserved
GPA0_INT_CON[2]
Bit
[31]
Reserved
[30:28]
Sets the signaling method of GPA0_INT[7]
000 = Low level
001 = High level
010 = Falling edge triggered
011 = Rising edge triggered
100 = Both edge triggered
101 ~ 111 = Reserved
[27]
Reserved
[26:24]
Sets the signaling method of GPA0_INT[6]
000 = Low level
001 = High level
010 = Falling edge triggered
011 = Rising edge triggered
100 = Both edge triggered
101 ~ 111 = Reserved
[23]
Reserved
[22:20]
Sets the signaling method of GPA0_INT[5]
000 = Low level
001 = High level
010 = Falling edge triggered
011 = Rising edge triggered
100 = Both edge triggered
101 ~ 111 = Reserved
[19]
Reserved
[18:16]
Sets the signaling method of GPA0_INT[4]
000 = Low level
001 = High level
010 = Falling edge triggered
011 = Rising edge triggered
100 = Both edge triggered
101 ~ 111 = Reserved
[15]
Reserved
[14:12]
Sets the signaling method of GPA0_INT[3]
000 = Low level
001 = High level
010 = Falling edge triggered
011 = Rising edge triggered
100 = Both edge triggered
101 ~ 111 = Reserved
[11]
Reserved
[10:8]
Sets the signaling method of GPA0_INT[2]
000 = Low level
001 = High level
010 = Falling edge triggered
2 GENERAL PURPOSE INPUT/ OUTPUT
Description
Initial State
0
000
0
000
0
000
0
000
0
000
0
000
2-132

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