Status Register Sets; Register Bit Descriptions - Keithley 2700 User Manual

11-12 Status Structure

Status register sets

As shown in
Model 2700: Standard Event Status, Operation Event Status, Measurement Event Status,
and Questionable Event Status.

Register bit descriptions

Standard event register
The used bits of the Standard Event Register
•
Figure 11-4
Standard event status
* ESR ?
OR
To Event
Summary
Bit (ESB) of
Status Byte
Register.
* ESE
* ESE ?
Figure 11-1, there are four status register sets in the status structure of the
Bit B0, Operation Complete (OPC) — Set bit indicates that all pending selected
device operations are completed and the Model 2700 is ready to accept new com-
mands. This bit only sets in response to the *OPC? query command. See
Section 12 for details on *OPC and *OPC?.
PON URQ
(B15 - B8) (B7) (B6)
&
&
PON URQ
(B15 - B8) (B7) (B6)
PON = Power On
URQ = User Request
CME = Command Error
EXE = Execution Error
DDE = Device-Dependent Error
Model 2700 Multimeter/Switch System User's Manual
(Figure 11-4) are described as follows:
CME EXE DDE QYE
(B5) (B4) (B3) (B2) (B1) (B0)
&
&
&
&
CME EXE DDE QYE
(B5) (B4) (B3) (B2) (B1) (B0)
QYE = Query Error
OPC = Operation Complete
& = Logical AND
OR = Logical OR
Standard Event
OPC
Status Register
&
Standard Event
OPC
Status Enable
Register