Cpu 1/7 (Dmi, Peg, Fdi - Clevo W170HN Service Manual

CPU 1/7 (DMI, PEG, FDI)

Sandy Bridge Processor 1/7 ( DMI,PEG,FDI )
CPU
H 1 6 H 1 5 H 8
H 8 _ 0 D 4 _ 4 H 8 _ 0 D 4_ 4 H 8 _0 D 4 _4
CAD NOTE: DP_COMPIO an d ICOMPO sig nals
should be shorted near balls and r outed with
- typical impedance < 25 mohms
1 . 0 5 V S _ V T T
R 5 21
1 K _ 1 % _ 04
ED P F unc ti on Di sa ble
ED P_ HP D: Pu ll -u p1 0K - DIS AB LE D
11/1
Q 44
G *M T N 7 0 0 2 Z H S 3
1 1 E M B _ H P D 1 1 D P _ A U X P
1 1 D P _ A U X N
R 5 2 0
*1 0 0 K _ 04
1 1 D P _ T XP 0
1 1 D P _ T XP 1
1 1 D P _ T XP 2
1 1 D P _ T XN 0
1 1 D P _ T XN 1
1 1 D P _ T XN 2
U 4 9 A
B 2 7
2 0 D M I _T X N 0 D MI _ R X #[ 0]
B 2 5
2 0 D M I _T X N 1 A 2 5 D MI _ R X #[ 1]
2 0 D M I _T X N 2 D MI _ R X #[ 2]
B 2 4
2 0 D M I _T X N 3 D MI _ R X #[ 3]
B 2 8
2 0 D M I _T X P 0 D MI _ R X [ 0 ]
B 2 6
2 0 D M I _T X P 1 D MI _ R X [ 1 ]
A 2 4
2 0 D M I _T X P 2 B 2 3 D MI _ R X [ 2 ]
2 0 D M I _T X P 3 D MI _ R X [ 3 ]
G2 1
2 0 D MI _ R X N 0
E 2 2 D MI _ T X # [ 0 ]
2 0 D MI _ R X N 1 D MI _ T X # [ 1 ]
F 2 1
2 0 D MI _ R X N 2
D MI _ T X # [ 2 ]
D 2 1
2 0 D MI _ R X N 3 D MI _ T X # [ 3 ]
G2 2
2 0 D MI _ R X P 0
D 2 2 D MI _ T X [ 0 ]
2 0 D MI _ R X P 1 D MI _ T X [ 1 ]
F 2 0
2 0 D MI _ R X P 2 D MI _ T X [ 2 ]
C 2 1
2 0 D MI _ R X P 3
D MI _ T X [ 3 ]
A 2 1
2 0 F D I _ T XN 0 F D I 0 _ T X# [ 0 ]
H 1 9
2 0 F D I _ T XN 1
E 1 9 F D I 0 _ T X# [ 1 ]
2 0 F D I _ T XN 2 F D I 0 _ T X# [ 2 ]
F 1 8
2 0 F D I _ T XN 3 F D I 0 _ T X# [ 3 ]
B 2 1
2 0 F D I _ T XN 4
C 2 0 F D I 1 _ T X# [ 0 ]
2 0 F D I _ T XN 5 F D I 1 _ T X# [ 1 ]
D 1 8
2 0 F D I _ T XN 6
F D I 1 _ T X# [ 2 ]
E 1 7
2 0 F D I _ T XN 7 F D I 1 _ T X# [ 3 ]
A 2 2
2 0 F D I _ T XP 0 F D I 0 _ T X[ 0 ]
G1 9
2 0 F D I _ T XP 1 F D I 0 _ T X[ 1 ]
E 2 0
2 0 F D I _ T XP 2
G1 8 F D I 0 _ T X[ 2 ]
2 0 F D I _ T XP 3 F D I 0 _ T X[ 3 ]
B 2 0
2 0 F D I _ T XP 4 F D I 1 _ T X[ 0 ]
C 1 9
2 0 F D I _ T XP 5
D 1 9 F D I 1 _ T X[ 1 ]
2 0 F D I _ T XP 6 F D I 1 _ T X[ 2 ]
F 1 7
2 0 F D I _ T XP 7 F D I 1 _ T X[ 3 ]
1. 05 V S _V TT J 1 8
2 0 F D I _ F S Y N C 0 F D I 0 _ F S Y N C
J 1 7
2 0 F D I _ F S Y N C 1 F D I 1 _ F S Y N C
H 2 0
2 0 F D I _ I N T F D I _ I N T
J 1 9
2 0 F D I _ L S Y N C 0 F D I 0 _ L S Y N C
H 1 7
R 5 1 9
2 0 F D I _ L S Y N C 1 F D I 1 _ L S Y N C
24 . 9 _ 1 % _0 4
A 1 8
E D P _ C O MP I O
e D P _ C O MP I O
A 1 7
DP Compensation Signal
e D P _ I C O MP O
E D P _ H P D B 1 6
e D P _ H P D
C 1 97 * 0 . 1 u_ 1 0 V _ X 7 R _ 0 4 D P _ A U X _ P C 1 5
D 1 5 e D P _ A U X
C 2 14 * 0 . 1 u_ 1 0 V _ X 7 R _ 0 4 D P _ A U X _ N
e D P _ A U X #
C 1 7
C 1 78 * 0 . 1 u_ 1 0 V _ X 7 R _ 0 4 D P _ TX P _ 0
e D P _ TX [ 0 ]
D P _ TX P _ 1 F 1 6
C 1 96 * 0 . 1 u_ 1 0 V _ X 7 R _ 0 4
e D P _ TX [ 1 ]
C 1 82 * 0 . 1 u_ 1 0 V _ X 7 R _ 0 4 D P _ TX P _ 2 C 1 6
e D P _ TX [ 2 ]
G1 5
e D P _ TX [ 3 ]
C 1 8
C 1 67 * 0 . 1 u_ 1 0 V _ X 7 R _ 0 4 D P _ TX N _ 0
e D P _ TX # [ 0 ]
D P _ TX N _ 1 E 1 6
C 1 86 * 0 . 1 u_ 1 0 V _ X 7 R _ 0 4
e D P _ TX # [ 1 ]
D P _ TX N _ 2 D 1 6
C 1 79 * 0 . 1 u_ 1 0 V _ X 7 R _ 0 4
F 1 5 e D P _ TX # [ 2 ]
e D P _ TX # [ 3 ]
1 1/1
P Z 9 88 2 7 -3 6 4B -0 1F
3 , 8 , 1 1 , 12 , 1 6 , 1 8 , 1 9 , 20 , 2 2 , 2 3 , 2 4, 25 , 2 7 , 2 8 , 2 9, 30 , 3 3 , 3 5 , 3 7, 38 , 3 9
1 . 0 5V S _ V T T
20 mil
J 2 2 P E G _ I R C OM P _ R
R 1 3 3 2 4 . 9 _ 1 %_ 0 4
P E G_ I C OM P I J 2 1
P E G _ I C O MP O
H 2 2
P E G_ R C O MP O
K 33
P E G_ R X #0 1 2
P E G_ R X # [ 0 ]
M 3 5
P E G_ R X #1 1 2
P E G_ R X # [ 1 ] L 3 4
P E G_ R X # [ 2 ] P E G_ R X #2 1 2
J 3 5
P E G_ R X #3 1 2
P E G_ R X # [ 3 ]
J 3 2
P E G_ R X #4 1 2
P E G_ R X # [ 4 ] H 3 4
P E G_ R X # [ 5 ] P E G_ R X #5 1 2
H 3 1
P E G_ R X #6 1 2
P E G_ R X # [ 6 ]
G 3 3
P E G_ R X #7 1 2
P E G_ R X # [ 7 ] G 3 0
P E G_ R X # [ 8 ]
F 35
P E G_ R X # [ 9 ]
E 34
P E G_ R X# [ 1 0 ]
E 32
P E G_ R X# [ 1 1 ]
D 3 3
P E G_ R X# [ 1 2 ] D 3 1
PEG Compen sation Signa l
P E G_ R X# [ 1 3 ]
B 33
P E G_ R X# [ 1 4 ]
C 3 2
P E G_ R X# [ 1 5 ]
CAD NOTE: PEG_I COMPI and RC OMPO signals
J 3 3
P E G_ R X 0 12
P E G _ R X [ 0 ] sho uld be short ed and route d with
L 3 5
P E G_ R X 1 12
P E G _ R X [ 1 ] K 34
- m ax length = 500 mils
P E G _ R X [ 2 ] P E G_ R X 2 12
H 3 5
P E G_ R X 3 12
P E G _ R X [ 3 ]
H 3 2 - t ypical imped ance = 43 mo hms
P E G_ R X 4 12
P E G _ R X [ 4 ] G 3 4
P E G_ R X 5 12 PEG _ICOMPO sign als should b e routed wit h
P E G _ R X [ 5 ]
G 3 1
P E G_ R X 6 12
P E G _ R X [ 6 ]
F 33 - m ax length = 500 mils
P E G_ R X 7 12
P E G _ R X [ 7 ] F 30
P E G _ R X [ 8 ] - t ypical imped ance = 14.5 mohms
E 35
P E G _ R X [ 9 ]
E 33
P E G_ R X [ 1 0 ]
F 32
P E G_ R X [ 1 1 ]
D 3 4
P E G_ R X [ 1 2 ] E 31
P E G_ R X [ 1 3 ]
C 3 3
P E G_ R X [ 1 4 ]
B 32
P E G_ R X [ 1 5 ]
M 2 9 P E G _T X # _ 0
C 5 9 1 0 . 2 2u _ 1 0 V _ X 5R _ 0 4
P E G _ TX # [ 0 ] P E G_ T X # 0 12
M 3 2 P E G _T X # _ 1 C 5 8 9 0 . 2 2u _ 1 0 V _ X 5R _ 0 4
P E G_ T X # 1 12
P E G _ TX # [ 1 ] M 3 1
P E G _T X # _ 2 C 5 9 4 0 . 2 2u _ 1 0 V _ X 5R _ 0 4
P E G _ TX # [ 2 ] P E G_ T X # 2 12
L 3 2 P E G _T X # _ 3
C 5 9 6 0 . 2 2u _ 1 0 V _ X 5R _ 0 4
P E G _ TX # [ 3 ] P E G_ T X # 3 12
L 2 9 P E G _T X # _ 4 C 5 9 8 0 . 2 2u _ 1 0 V _ X 5R _ 0 4
P E G_ T X # 4 12
P E G _ TX # [ 4 ] K 31
P E G _T X # _ 5 C 6 0 1 0 . 2 2u _ 1 0 V _ X 5R _ 0 4
P E G _ TX # [ 5 ] P E G_ T X # 5 12
K 28 P E G _T X # _ 6
C 6 0 6 0 . 2 2u _ 1 0 V _ X 5R _ 0 4
P E G _ TX # [ 6 ] P E G_ T X # 6 12
J 3 0 P E G _T X # _ 7 C 6 0 8 0 . 2 2u _ 1 0 V _ X 5R _ 0 4
P E G_ T X # 7 12
P E G _ TX # [ 7 ] J 2 8
P E G _ TX # [ 8 ]
H 2 9
P E G _ TX # [ 9 ]
G 2 7
P E G _ T X# [ 1 0 ]
E 29
P E G _ T X# [ 1 1 ]
F 27
P E G _ T X# [ 1 2 ] D 2 8
P E G _ T X# [ 1 3 ]
F 26
P E G _ T X# [ 1 4 ]
E 25
P E G _ T X# [ 1 5 ]
M 2 8 P E G _T X _ 0
C 5 8 7 0 . 2 2u _ 1 0 V _ X 5R _ 0 4
P E G _T X [ 0 ] P E G_ T X 0 1 2
M 3 3 P E G _T X _ 1 C 5 8 8 0 . 2 2u _ 1 0 V _ X 5R _ 0 4
P E G_ T X 1 1 2
P E G _T X [ 1 ] M 3 0
P E G _T X _ 2 C 5 9 3 0 . 2 2u _ 1 0 V _ X 5R _ 0 4
P E G _T X [ 2 ] P E G_ T X 2 1 2
L 3 1 P E G _T X _ 3
C 5 9 5 0 . 2 2u _ 1 0 V _ X 5R _ 0 4
P E G _T X [ 3 ] P E G_ T X 3 1 2
L 2 8 P E G _T X _ 4 C 5 9 7 0 . 2 2u _ 1 0 V _ X 5R _ 0 4
P E G_ T X 4 1 2
P E G _T X [ 4 ] K 30
P E G _T X _ 5 C 6 0 2 0 . 2 2u _ 1 0 V _ X 5R _ 0 4
P E G _T X [ 5 ] P E G_ T X 5 1 2
K 27 P E G _T X _ 6
C 6 0 4 0 . 2 2u _ 1 0 V _ X 5R _ 0 4
P E G _T X [ 6 ] P E G_ T X 6 1 2
J 2 9 P E G _T X _ 7 C 6 0 7 0 . 2 2u _ 1 0 V _ X 5R _ 0 4
P E G_ T X 7 1 2
P E G _T X [ 7 ] J 2 7
P E G _T X [ 8 ]
H 2 8
P E G _T X [ 9 ]
G 2 8
P E G _ TX [ 1 0 ]
E 28
P E G _ TX [ 1 1 ]
F 28
P E G _ TX [ 1 2 ] D 2 7 Q 2 6
P E G _ TX [ 1 3 ]
E 26 5 1
P E G _ TX [ 1 4 ] G N D N C
D 2 5 2
P E G _ TX [ 1 5 ] GN D
4 3
V C C V O
3 . 3 V
* T MP 2 0
Q 2 7
2 1 1 :2 ( 4m ils :8 mi ls )
V C C OU T
C 67 3
3 C 6 7 2
G N D
0 . 1 u _1 0 V _ X 7 R _ 0 4 0 . 1 u_ 1 0 V _ X 7 R _ 0 4
G 7 11 S T 9 U
PLACE NEAR U3
3, 5 , 2 3 , 2 4 , 2 5, 35 , 3 9 1 . 0 5 V S _ V T T
3 . 3 V
Schematic Diagrams
Sheet 2 of 49
CPU 1/7
(DMI, PEG, FDI)
SC70-5 & SC70-3
Co-lay
T H E R M _V OL T 3 4
8/30
1
3
2
CPU 1/7 (DMI, PEG, FDI) B - 3