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Processor 1/7-DMI, FDI, PEG
Ivy Bridge Quad Core 55W
Ivy Bridge Dual Core 35W
Ivy Bridge LV/ULV 25/17W
2012 Ivy Bridge Socket compatible with Sandy Bridge.
2012 Ivy Bridge Same TDP as Sandy Bridge.
2012 Ivy DDR3-1600 and DDR3L-1333 Support.
2012 Ivy PCIe*Gen3.0(PEGX16).
2012 Ivy DX11 Support, 3 Simultaneous Displays.
CAD NOTE: DP_COMPIO and ICOMPO signals
should be shorted near balls and routed with
- typical impedance < 25 mohms
1.05VS_VTT
R509
EDP
HPD Function
Disable
1K_1%_04
EDP_HPD: Pull-up10K- DISABLED HPD
CPU
H9
H17
H14
H8_0D4_4
H8_0D4_4
H8_0D4_4
Ivy Bridge Processor 1/7 ( DMI,PEG,FDI )
U36A
B27
20
DMI_TXN0
DMI_RX#[0]
B25
20
DMI_TXN1
DMI_RX#[1]
A25
20
DMI_TXN2
DMI_RX#[2]
B24
20
DMI_TXN3
DMI_RX#[3]
B28
20
DMI_TXP0
B26
DMI_RX[0]
20
DMI_TXP1
DMI_RX[1]
A24
20
DMI_TXP2
DMI_RX[2]
B23
20
DMI_TXP3
DMI_RX[3]
G21
20
DMI_RXN 0
DMI_TX#[0]
E22
20
DMI_RXN 1
DMI_TX#[1]
F21
20
DMI_RXN 2
DMI_TX#[2]
D 21
20
DMI_RXN 3
DMI_TX#[3]
G22
20
DMI_RXP0
D 22
DMI_TX[0]
20
DMI_RXP1
DMI_TX[1]
F20
20
DMI_RXP2
DMI_TX[2]
C 21
20
DMI_RXP3
DMI_TX[3]
A21
20
FD I_TXN 0
H 19
FD I0_TX#[0]
20
FD I_TXN 1
FD I0_TX#[1]
E19
20
FD I_TXN 2
F18
FD I0_TX#[2]
20
FD I_TXN 3
FD I0_TX#[3]
B21
20
FD I_TXN 4
FD I1_TX#[0]
C 20
20
FD I_TXN 5
FD I1_TX#[1]
D 18
20
FD I_TXN 6
FD I1_TX#[2]
E17
20
FD I_TXN 7
FD I1_TX#[3]
A22
20
FD I_TXP0
G19
FD I0_TX[0]
20
FD I_TXP1
E20
FD I0_TX[1]
20
FD I_TXP2
G18
FD I0_TX[2]
20
FD I_TXP3
FD I0_TX[3]
B20
20
FD I_TXP4
FD I1_TX[0]
C 19
20
FD I_TXP5
FD I1_TX[1]
D 19
20
FD I_TXP6
FD I1_TX[2]
F17
20
FD I_TXP7
FD I1_TX[3]
1.05VS_VTT
J18
20
FDI_FSY NC0
FD I0_FSY NC
J17
20
FDI_FSY NC1
FD I1_FSY NC
H 20
20
FDI_INT
FD I_INT
J19
20
FDI_LSY NC 0
FD I0_LSY NC
H 17
R508
20
FDI_LSY NC 1
FD I1_LSY NC
24.9_1%_04
ED P_COMPIO
A18
eDP_COMPIO
A17
DP Compensation Signal
B16
eDP_ICOMPO
ED P_HPD
eDP_HPD
C 15
eDP_AUX
D 15
eDP_AUX#
C 17
eDP_TX[0]
F16
eDP_TX[1]
C 16
G15
eDP_TX[2]
eDP_TX[3]
C 18
eDP_TX#[0]
E16
eDP_TX#[1]
D 16
eDP_TX#[2]
F15
eDP_TX#[3]
Iv y Bridge_rPGA_2DPC_Rev 0p61
Q28
5
1
GND
NC
2
GND
4
3
SC70-5 & SC70-3
VCC
VO
3.3V
*TMP20
Co-lay
Q29
2
1
VCC
OUT
C 682
3
1
GND
3
* 0.1u_10V_X7R_04
*G711ST9U
2
PLACE NEAR U3
1.05VS_VTT
20 mil
J22
PEG_IR COMP_R
R140
24.9_1%_04
PEG_ICOMPI
J21
PEG_ICOMPO
H 22
PEG_RCOMPO
K33
PEG_RX#0 12
PEG_RX#[0]
M35
PEG_RX#1 12
PEG_RX#[1]
L34
PEG_RX#2 12
PEG_RX#[2]
J35
PEG_RX#[3]
PEG_RX#3 12
J32
PEG_RX#[4]
PEG_RX#4 12
H 34
PEG_RX#5 12
PEG_RX#[5]
H 31
PEG_RX#6 12
PEG_RX#[6]
G33
PEG_RX#7 12
PEG_RX#[7]
G30
PEG_RX#[8]
F35
PEG_RX#[9]
E34
PEG_RX#[10]
E32
PEG_RX#[11]
D 33
PEG_RX#[12]
D 31
PEG Compensation Signal
PEG_RX#[13]
B33
PEG_RX#[14]
C 32
PEG_RX#[15]
CAD NOTE: PEG_ICOMPI and RCOMPO signals
J33
PEG_RX0 12
PEG_R X[0]
should be shorted and routed with
L35
PEG_RX1 12
PEG_R X[1]
K34
- max length = 500 mils
PEG_RX2 12
PEG_R X[2]
H 35
PEG_RX3 12
PEG_R X[3]
H 32
- typical impedance = 43 mohms
PEG_RX4 12
PEG_R X[4]
G34
PEG_RX5 12
PEG_ICOMPO signals should be routed with
PEG_R X[5]
G31
PEG_R X[6]
PEG_RX6 12
F33
- max length = 500 mils
PEG_R X[7]
PEG_RX7 12
F30
PEG_R X[8]
- typical impedance = 14.5 mohms
E35
PEG_R X[9]
E33
PEG_RX[10]
F32
PEG_RX[11]
D 34
PEG_RX[12]
E31
PEG_RX[13]
C 33
PEG_RX[14]
B32
PEG_RX[15]
M29
PEG_TX#_0
C 167
0.22u_10V_X5R_04
PEG_TX#[0]
PEG_TX#0 12
M32
PEG_TX#_1
C 168
0.22u_10V_X5R_04
PEG_TX#[1]
PEG_TX#1 12
M31
PEG_TX#_2
C 157
0.22u_10V_X5R_04
PEG_TX#[2]
PEG_TX#2 12
L32
PEG_TX#_3
C 147
0.22u_10V_X5R_04
PEG_TX#[3]
PEG_TX#3 12
L29
PEG_TX#_4
C 175
0.22u_10V_X5R_04
PEG_TX#[4]
PEG_TX#4 12
K31
PEG_TX#_5
C 166
0.22u_10V_X5R_04
PEG_TX#5 12
PEG_TX#[5]
K28
PEG_TX#_6
C 190
0.22u_10V_X5R_04
PEG_TX#6 12
PEG_TX#[6]
J30
PEG_TX#_7
C 178
0.22u_10V_X5R_04
PEG_TX#7 12
PEG_TX#[7]
J28
PEG_TX#[8]
H 29
PEG_TX#[9]
G27
PEG_TX#[10]
E29
PEG_TX#[11]
F27
PEG_TX#[12]
D 28
PEG_TX#[13]
F26
PEG_TX#[14]
E25
PEG_TX#[15]
M28
PEG_TX_0
C 176
0.22u_10V_X5R_04
PEG_TX0
12
PEG_TX[0]
M33
PEG_TX_1
C 159
0.22u_10V_X5R_04
PEG_TX1
12
PEG_TX[1]
M30
PEG_TX_2
C 165
0.22u_10V_X5R_04
PEG_TX[2]
PEG_TX2
12
L31
PEG_TX_3
C 156
0.22u_10V_X5R_04
PEG_TX[3]
PEG_TX3
12
L28
PEG_TX_4
C 179
0.22u_10V_X5R_04
PEG_TX[4]
PEG_TX4
12
K30
PEG_TX_5
C 174
0.22u_10V_X5R_04
PEG_TX[5]
PEG_TX5
12
K27
PEG_TX_6
C 181
0.22u_10V_X5R_04
PEG_TX[6]
PEG_TX6
12
J29
PEG_TX_7
C 180
0.22u_10V_X5R_04
PEG_TX[7]
PEG_TX7
12
J27
PEG_TX[8]
H 28
PEG_TX[9]
G28
PEG_TX[10]
E28
PEG_TX[11]
F28
PEG_TX[12]
D 27
PEG_TX[13]
E26
PEG_TX[14]
D 25
PEG_TX[15]
3.3V
W/O CPU THERMAL IC®É,
PCB·Å«×¶q´ú¥Î
6-17-10300-730
PTH1
10K_1%_NTC_06
1:2 (4mils:8mils)
THERM_VOLT 34
C686
R 654
*0.1u_10V_X7R _04
10K_1%_04
for ¦@¥Îr3.4_831
Schematic Diagrams
Sheet 2 of 50
Processor 1/7-DMI,
FDI, PEG
Processor 1/7-DMI, FDI, PEG B - 3
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