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FIGURE 4-3 DIP-Switch 64/32 Bit Setting
4•2•6
HARD RESET (HRESET) - Switch - SW7
HARD reset is generated when switch SW7 is pressed. When the Processor executes HARD reset
sequence, all its configuration is lost, including data stored in the SDRAMs and the Processor has
to be re-initialized.
4•2•7
Power-On RESET Switch (PRESET) - SW8
The Power-On reset switch SW8 performs Power-On reset to the MSC8101, as if the power was
re-applied to the ADS. When the Processor is reset that way, all configuration and all data residing
in volatile memories are lost. After PORST~ signal is negated, the Processor re-acquires the
power-on reset configuration data from the Flash (Altera) or Host I/F.
4•2•8
Configuration Switch - SW9
SW9 is a 8-switch DIP-Switch. This switch is connected over Altera device to MODCK(1:6) lines
of the Processor. The combination of the switches composing SW9, sets, during Power-On reset
sequence, the MODCK(1:6) field for the MSC8101. The switch SW9/7 establishes Configuration
Word Source. If SW9/7 is set to ON position Configuration Word will be loaded from the Flash, oth-
erwise from Altera device (default). The Host Configuration will be chosen with SW9/8 set ON,
when SW9/8 is OFF - PPC bus has 64-bit width.
The Switch SW9 is factory set to (1 - OFF, 2 - ON, 3 - OFF, 4 - OFF (X), 5 - ON, 6 - OFF, 7,8 -
OFF).
28
Freescale Semiconductor, Inc.
Operating Instructions
SW5
MSC8101ADS RevB User's Manual
For More Information On This Product,
Go to: www.freescale.com
SW6
MOTOROLA
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