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RESERVED
4•2•3
ABORT Switch - SW3
The ABORT switch is normally used to abort program execution, this by issuing a level 0 non-
maskable interrupt to the Processor. If the ADS is in stand alone mode, it is the responsibility of
the user to provide means of handling the interrupt, since there is no resident debugger with the
MSC8101-ADS. The ABORT switch signal is denounced, and can not be disabled by software.
4•2•4
SOFT RESET (SRESET) Switch - SW4
The SOFT reset switch SW4 performs Soft Reset to the Processor internal modules, maintaining
it's configuration (clocks & chip-selects) and SDRAMs' contents. The switch signal is debounced,
and it is not possible to disable it by software.
4•2•5
DATA Bus Width Setting - SW5 & SW6.
Two switches SW5 & SW6 are using together for preparing the SDRAM Memory Banks for Host
Interface Mode when HDI16 interface is provided over Data Bus lines D32-D63. They should be
set in "32bit" position when DIP-Switch SW9/8 HOST CFG set ON (PPC bus supports Host I/F)
and vice versa - "64bit" when Host I/F disable.
MOTOROLA
Freescale Semiconductor, Inc.
Operating Instructions
FIGURE 4-2 Switch SW2 - Description
SW2
EED
EE5
EE4
EE3
EE2
EE1
EE0
Set to '0' <=
MSC8101ADS RevB User's Manual
For More Information On This Product,
Go to: www.freescale.com
8
7
6
5
4
3
2
1
=> Set to '1'
27
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