Decoder; General; Pocsag Decoder - Multitone FLA 872 Technical Manual

3.3

DECODER

XL403
POCSAG
DECODER
IC402
DATA
FROM
RECEIVER
TP401
PGM
3.3.1

General

The Decoder comprises the POCSAG decoder, Microprocessor, EEPROM, SRAM
message memory and switches, plus support components and a separate LCD
module. The signal from the receiver is processed by IC402, the POCSAG decoder,
and the decoded data passed to the microprocessor. The microprocessor stores the
information in the SRAM, IC4, before activating the selected alert and sending the
message data to the LCD module for display. The EEPROM holds information
applicable to the unit.
3.3.2

POCSAG Decoder

The POCSAG decoder, IC402, is located on the Radio Board of the unit and
connects to the microprocessor, IC3, through PL40I / SK1. Pin 4 of IC402 receives
the data signal from IC401. IC402 decodes the information and sends it, four bytes
at a time, to the microprocessor, IC3. IC402 uses the SCK clock pulses from IC3,
pin 59, to transfer the data on the SDO line, IC402, pin 13.
When no signals are received by the unit, the system goes into a standby mode to
reduce power consumption. In this mode, a pulse from IC402 pin 1 (BS1), sets the
receiver circuits ON for a brief period every 0.5s - 1s, depending upon Baud rate, to
check for a preamble signal. If such a signal is received, followed by a valid address
and message, a signal is sent from IC402, pin 15 (ATTN) to alert the microprocessor.
TM1205 Issue 2
EEPROM
IC1
RESET
VDD
RESET
IC5
PL401 SK1
SW3
!>
BUTTON
SW2
BUTTON
SW1
BUTTON
Figure 3.3: Decoder Block Diagram
ADDRESS BUS
DATA BUS
CONTROL LINES
MICRO-
PROCESSOR
IC3
SK1 PL401
TLA 852/FLA 872
SRAM
IC4
LIQUID
CRYSTAL
DISPLAY
MODULE
RESET
DRIVER
TR415
AUDIBLE
TR416
ALERT
DRIVER
TR2 OR
DISPLAY
ILLUMI-
NATION
M
DRIVER
TR3; TR4
VIBRATE
MOTOR
TAG11122-1
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