Integra DTR-4.9 Service Manual page 67

QQ
3 7 63 1515 0
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-32
Q6311 : ICL3221ECVZ (RS-232 Transmitters / Receivers)
BLOCK DIAGRAM
TE
L 13942296513
TERMINAL DESCRIPTION
Pin Name
VCC
V+
V-
GND
C1+
C1-
C2+
C2-
T1IN
T1OUT
R1IN
R1OUT
INVALID
EN
FORCEOFF
FORCEON
www
.
http://www.xiaoyu163.com
TOP VIEW
EN 1
C1+ 2
V+ 3
C1- 4
C2+ 5
C2- 6
V- 7
R1IN 8
Description
System power supply input (3.0V to 5.5V).
Internally generated positive transmitter supply (+5.5V).
Internally generated positive transmitter supply (-5.5V).
Ground connection.
External capacitor (voltage doubler) is connected to this lead.
External capacitor (voltage doubler) is connected to this lead.
External capacitor (voltage inverter) is connected to this lead.
External capacitor (voltage inverter) is connected to this lead.
TTL/CMOS compatible transmitter Inputs.
±15kV ESD Protected, RS-232 level (nominally +5.5V) transmitter outputs.
±15kV ESD Protected, RS-232 compatible receiver inputs.
TTL/CMOS level receiver outputs.
Active low output that indicates if no valid RS-232 levels are present on any receiver input.
Active low receiver enable control; doesn't disable ROUTB outputs.
Active low to shut down transmitters and on-chip power supply.
This overrides any automatic circuitry and FORCEON.
Active high input to override automatic powerdown circuitry thereby keeping transmitters active.
x ao u163
y
i
http://www.xiaoyu163.com
2 9
8
16 FORCEOFF
15 VCC
14 GND
13 T1OUT
12 FORCEON
11 T1IN
10 INVALID
R1
9 R1OUT
Q Q
3 6 7 1 3
.
9 4 2 8
1 5 0 5 8 2 9 9 4
m
co
DTR-4.9
9 9
2 8 9 9