Integra DTR-4.9 Service Manual page 57

QQ
3 7 63 1515 0
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-22
Q8401 : SiI9034CTU (HDMI Transmitter)-1/4
BLOCK DIAGRAM
2
CSDA
I C
Slave
CSCL
CI2CA
RESET#
Video Data
IDCK
Capture /
D[23:0]
DE Gen /
TE
L 13942296513
HSYNC
656
VSYNC
Logic
DE
Block
DCLK
SPDIF
MCLK
Audio Data
SCK
Capture /
WS
Logic
SD[3:0]
Block
DL[3:0]
DR[3:0]
www
.
http://www.xiaoyu163.com
Registers
Configuration
Logic Block
Video
Processing
control signals
audio data
x ao u163
y
i
http://www.xiaoyu163.com
2 9
8
Receiver Sense + Interrupt Logic
HDCP
Keys
ROM
Q Q
Packetizer
3 6 7 1 3 1 5
co
.
9 4 2 8
E-DDC
Master
encrypted
data
VastLane
XOR
0 5 8 2 9 9 4 2 8
TMDS
Digital
Core
m
DTR-4.9
9 9
5V
DSDA
DSCL
INT
HPD
EXT_SWING
TXC
9 9
TX0
TX1
TX2