Integra DTR-4.9 Service Manual page 61

QQ
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IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-26
Q8051 : SiI9013 ( HDMI Receiver)-1/4
BLOCK DIAGRAM
DSDA
DSCL
RXC
TE
L 13942296513
Panel Link
RX0
TMDS
Digital
RX1
Core
RX2
PWR5V
www
.
http://www.xiaoyu163.com
2
I C
Slave
HDCP
Keys
HDCP
Descryption
Engine
XOR
Mask
HS, VS, DE
CKDT
Port
Detect
x ao
y
i
http://www.xiaoyu163.com
8
Registers
Configuration
Logic Block
Aux
Data
HDMI
Mode
Control
Q Q
3 6 7 1 3
24-BIt
Decrypted
Pixel Data
u163
.
2 9 9 4 2 8
2
I C
Slave
MCLK
Gen
Audio
1 5 0 5 8 2 9 9 4
Data
Decode
Auto A/V
Exception Handling
Video Color
Space
Converter /
4:2:2/4:4:4
Decimator
48
m
co
DTR-4.9
9 9
RESET#
INT
CSDA
CSCL
CI2CA
MCLK
XTALIN
XTALOUT
SPDIF
WS
SCK
2 8 9 9
SD0
SD1
SD2
SD3
MUTE
SCDT
DE
HSYNC
VSYNC
ODCK
QE[23:0]
QO[23:0]