Integra DTR-4.9 Service Manual page 17

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SCHEMATIC DIAGRAMS-12
WAVEFORM SECTION-3/3
FL Driver IC Control Waveform Part
1
<Notes>
1. WF61 is short for Waveform-61 .
2. Refer to SD-6 (SCHEMATIC DIAGRAMS-6) for the location of each waveform on circuit.
3. SD-x : XY is short for Schematic Diagrams-x and each socket's location, X=A to H, Y=1 to 5.
SCK/SDATA waveform
WF61 SD-6 : C3
5V
SCK
0V
2ms
2
5V
SDATA
0V
SCK/CS waveform
WF62 SD-6 : C3
5V
SCK
TE
L 13942296513
0V
2ms
3
5V
CS
0V
SCK/RESET waveform
WF63 SD-6 : C3
5V
SCK
0V
4
5V
RESET
0V
When power on
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SCK/SDATA waveform
5V
SCK
0V
12ms
5V
SDATA
0V
SDATA waveform varies according to
the data content
12ms
SCK/RESET waveform
5V
SCK
0V
0.45s
5V
RESET
0V
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WF61 SD-6 : C3
10 s u
Q Q
3 6 7 1 3
WF63 SD-6 : C3
0.6s
When power off
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C
2 9 9 4 2 8
1 5 0 5 8 2 9 9 4
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DTR-4.9
D
9 9
2 8 9 9