Filter Setting
125 ns
6.425 µs
2.55 ms
Disabled
PFI Terminal
Filter Clock
(40 MHz)
Filtered Input
© National Instruments Corporation
Table 10-1. Filters
N (Filter Clocks
Needed to Pass
Signal)
5
257
~101,800
—
The filter setting for each input can be configured independently. On power
up, the filters are disabled. Figure 10-4 shows an example of a low to high
transition on an input that has its filter set to 125 ns (N = 5).
1
1
2
3
4
Enabling filters introduces jitter on the input signal. For the 125 ns and
6.425 µs filter settings, the jitter is up to 25 ns. On the 2.55 ms setting, the
jitter is up to 10.025 µs.
When a PFI input is routed directly to RTSI, or a RTSI input is routed
directly to PFI, the M Series device does not use the filtered version of the
input signal.
Refer to the KnowledgeBase document, Digital Filtering with M Series, for
more information about digital filters and counters. To access this
KnowledgeBase, go to
Pulse Width
Guaranteed to Pass
Filter
125 ns
6.425 µs
2.55 ms
—
1
2
3
4
5
Figure 10-4. Filter Example
and enter the info code
ni.com/info
10-5
Chapter 10
Pulse Width
Guaranteed to Not
Pass Filter
100 ns
6.400 µs
2.54 ms
—
Filtered input goes high
when terminal is sampled
high on five consecutive
filter clocks.
rddfms
NI USB-621x User Manual
PFI
.