Table of Contents
Advertisement
-
M Z 3500
PIn No
Polarity
Signal Name
57
SYSR
58
FD3
- - -
59
COAB
60
R01B
61
GND
62
Vcc
63
R02B
64
R038
65
ROB
66
CLK
67
R04B
68
MPX
69
GND
70
CASB
71
GND
72
INT8
73
INIOUT
IN
IN
IN
OUT
IN
IN
OUT
IN
OUT
OUT
IN
OUT
IN
OUT
Functton
---- --- - - - - - - - - - - - -
System reset signal.
Used to reset 1/0 port in the MMR.
(System Reset)
-
-- ----
- - - - - - - -------
- -
Input from the sytem assignment dip switch.
·See the dip switch description, provided separately.
---- ----
-
~-------
--- -- - - - -
Shared RAM select signal.
Address of the shared RAM is #F800·#FFFF for the main CPU
(Common RAM Address)
-
- -
Select signal for 8KB area allocated to slot 1.
Valid when SD2 is active (ROM based BASIC) and SD3 (RAM based BASIC)
(ROM 1)
Ground
5V supply
Select signal for 8KB area allocated to slot 2 or 3.
Valid when SD2 is active (ROM based BASIC) and SD3 (RAM based BASIC!.
(ROM2,3)
Read signal from the main CPU.
(Read)
EAIT signal generation clock.
(Clae")
Select signal for 8KB area allocated to slot 4.
Valid when SD2 or SD3 (RAM based BASIC) are active.
(ROM 4)
RAS/CAS address switching signal for the main CPU DRAM.
High: Row address
Low: Column address
(Multiplex)
Ground
CAS (Column Address) signal for the main CPU 64K DRAM.
"Refresh for the RAM only.
(Column Address Select Bu ffer)
- - - - - - - - - - - - - - - - - - - -
--
Ground
Interrupt signal to the main CPU.
(I
nterrupt)
Not used
- 22-
Advertisement
Table of Contents
