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3.1
Signal Description
LVDS is a differential signal technology for LCD interface and high speed data trans-
fer device. The connector pin definition is as below.
Note: "Low" stands for 0V. "High" stands for 3.3V. "NC" stands for "Not Connected."
3.1.1
Signal Description
J2 LVDS connector: CSTAR CP100-S20G-H16
Table 3.1: Symbol Description
Pin No.
Symbol
1
VCC
2
VCC
3
GND
4
GND
5
IN0-
6
IN0+
7
GND
8
IN1-
9
IN1+
10
GND
11
IN2-
12
IN2+
13
GND
14
CLK-
15
CLK+
16
GND
17
NC
18
NC
19
GND
20
GND
J3 LED connector: ENTERY 3808K-F05N-03L (Mating connector: ENTERY H2808K-
P04N-02B)
Pin No.
Symbol
1
V
LED
2
GND
3
LED_ON/OFF
4
PWM
ITEM
ADJ (Dimming) signal frequency
ADJ signal logic level High
ADJ signal logic level Low
IDK-1105 User Manual
Description
Power Voltage for Logic: 3.3V
Power Voltage for Logic: 3.3V
Ground
Ground
- LVDS differential data input 1
+ LVDS differential data input 1
Ground
- LVDS differential data input 2
+ LVDS differential data input 2
Ground
- LVDS differential data input
+ LVDS differential data input
Ground
-Sampling Clock
+Sampling Clock
Ground
No Connect
No Connect
Ground
Ground
Description
Power Voltage for Backlight: 5V
Power Ground
Backlight ON/OFF, "H" LED ON, "L" LED OFF.
PWM input for LED brightness adjustment
SYMBOL MIN
fPWM
0.1
V
3
ADJL
V
GND
ADJL
12
Note
Note
TYP
MAX
UNIT
--
200
KHz
--
5
V
--
0.3
V
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