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-
M Z-5600
2. Operational description
The precompensation circuit is used to produce reading
allowance by making compensation when writing the peak
shift in the 640 KB MFM mode. As the FDC sends on PSO
and PSl the compensation ratio at the time of write and
the location of the write data is shifted according to the
signal. However, precompensation is not done under the
640 KB FM mode and 1 MB mode.
PSO
. PS,
~ompensation
shift -
0
0
1
1
3. Timings
8MHz
WR DATA
( FDC)
WR DATA
0
1
0
1
(FDD FARL Y'r---..J
WR DATA
As It Is
LATE
EARLY
-
(FDD as It is) _ _ _ _ __'
WR DATA
(FDD LATE) _ _ _ _ _ _ __'
8-5 VFO
circu it
1. Block diagram
1---+--.1
On ... hot
M 1
multivibrator
1
time constant
M6
VFO
'-------~ Sinch
WRDATA
output
C4
C6
C5
-
766A
FIlC
RD DATAIoE----RD DATA
(FDD)
Wind
RD DAT ..... - - I DATA
MFM
MFM
S Y N C : I - - - - - - - -_ _
---l
D R : a - - - - - - - - - - - - - - - -____
~
L....-_-..:I
2. Operational descriptio.,
The VFO circuit is used to distinguish the data section from
the clock section when reading data from the FDD and is
used to increase the reading margin to permit the window
to follow a read data phase change fror such as a disk motor
rotation change.
Four one-shot multivibrators of Ml, M2, M4, and M5 are in
the VFO.
Ml: For read data phase comparison
M2: For SYNC byte detection
M4: For ID field separation
M5: For read data output pulse determination
As Ml, M2, and M4 need different time constant under the
1 MB mode and the 640 KB mode, it sould be attained in
the following manner
-36-
·RIGH
DEN
~
When High Den
=
"0", the time constant must be CR1.
When High Den = "1", the time constant must be
C(Rl
+
R2).
Also, Ml and M2 need to adjust as their pulse widths affect
the reading margin.
When a SYNC byte is detected or when the I D field is
recognized, the data are read exactly with an increased gain,
and the gain is decreased in read)n9.the actual data in order
to achieve positive reading. Forfthis purpose, DATA AREA
signal is created from the FDC issued SYNC and DRQ to
use it for switching of the gain level.
1
I
ID section
Data saction
~
SYNC(FDC) ~~ ___________________ ~
--4R1UL -
~
----
JW'-+-./ -
DATA AREA _ _ _ _ _
~
~
DRQ(FDC)
The signal after phase comparison pumps up and down the
!
filter circuit, control the VCO oscillation frequency inside
t
the VFO, and absorbs a change in the read data. (PLU, PDL
I
'" Low gain, PUH, PDH ... High Gain)
~.l
This filter circuit has also to be changed of the time
constant under the 1 MB mode and the 640 KB mode.
. .
3. VFO circuit adjustment
VFO circuit adjustment Potentiometers VRO through 4
and the trimmer capacitor CSO are provi7ed in the VFO
circuit, which need to be adjusted again whenever the LSI
!
or its components are replaced.
~f
1) Special tools required
.
Special VFO adjusting tool (UKOG-l0llACZZ)
Oscilloscope of more then 100 MHz, having 50 ms, 0.1
. .
J,ls,
0.1
J,lS,
0.2
J,lS,
0.5
J,lS,
and 1
J,lS
ranges.
!
2) Connection of the tool
i
~
f
I
See the figure below for conection of the special tools.
!
I
CPU PWB
!
Fig. 1 Connection of special tools
3) Adjusting procedure
f
a) Strap setup
1
Observe the table below for connection of three
t
i
~
1-
straps provided on the PWB.
t
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