Timing Chart - GigE FC11000GE Instruction Manual

8. Timing Chart

● Pixel clock timing (common in various operation modes)
[Phase relationship between clock output and data]
１ＣＬＫ＝３０．８ｎＳ
CLK
Cl o ck ou tp u t
１０ｎｓ(max)
Di g it a l da t a
Ｃ Ｈ １ ／ Ｃ Ｈ ２
１ ０ o r ８ o r １ ２ b it
(Note) The above timing represents the signal timing before being input to the input part of the GigE interface unit (Camera
Link interface).
All the synchronization signals described in this section are internal signals as the synchronization signal
(FVAL,LVAL,CLK etc.) is not output to the outside in the case of GigE camera.
(Note) The image signals which are input into Camera Link interface through two taps(CH1,CH2) are output from LAN
connector as the image data after forming successive single image in the GigE interface.
(!) In the case of Fx11000GE, the image signals are output in order from the left even in DUAL output mode (5fps) as they are
sorted using internal buffer
FC11000CL 5fps(DUAL)
Imaging area
有 効 撮 像 領 域
Ｖ
So rt i ng
Ou t pu t d ir e ct i on
Od d-n umb ered pi xel
Ev en num bere d p ixe l
Ta p 1( Fr o m t he l e ft ； O d d nu m be r )
Ta p 2( Fr o m t he l e ft ； E v en n u mb e r)
Co nve ntio nal camera：e.g.FC5100CL 15 fps (DUA L)
Ｖ
O ut pu t d i re ct i on
ta p1
(F ro m t h e le f t)
Camera Link
output
Output form when in DUAL scanning
- 29 -
DEMULTIPLEX.
8～12bit
CH1 10/8/12bit
Ａ／Ｄ
8～12bit 10/8/12bit
Ａ／Ｄ
CH2
(LVAL,FVAL)
CLK
1／1
PCLK
Ima ging ar ea
有 効 撮 像 領 域
O u tp u t di r ec t io n
t ap 2
( Fr o m t he r i gh t )
C amera Link
o utput
K09821;29/37
Ｌ Ａ Ｎ
co n ne ct or