Lvds Vesa, Jeida Format Selection Pin Header (Jlvds_Vcon1); Cmos Battery Wafer Box (Bat1) - Advantech AIMB-226 User Manual

13 Reserved
15 GND
17 Reserved
19 Reserved
21 DETECT#
23 RX+
25 RX-
27 GND
29 GND
31 TX-
33 TX+
35 GND
37 GND
39 +3.3V
41 +3.3V
43 Reserved
45 Reserved
47 Reserved
49 Reserved
51 MSATA_DETECT#
B.24 LVDS VESA, JEIDA format selection pin header
(JLVDS_VCON1)
Pin
1
2
3
B.25

CMOS battery wafer box (BAT1)

Pin
1
2
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
Signal
+3.3V
OPTION
GND
Signal
BAT VCC
GND
93
Reserved
Reserved
GND
Reserved
Reserved
+3.3V
GND
+1.5V
SMB_CLK
SMB_DATA
GND
Reserved
Reserved
GND
Reserved
Reserved
Reserved
+1.5V
GND
+3.3V
AIMB-226 User Manual