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Hitachi MB-6890 Service Manual page 34

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SNZ4Sl 63l\£
(Synchronous
4-bit
(Synchronous
m
Output
(SV)
VW
OA
08
U5 U5 Il
El
§gg; ,G»
Ol
ctw
C*
A
B
ll
ll
B
ll
Clwf
Clock
A
B
om
5-37
[__]
Clsor
[__]
Load
A
'_t:::::"" ---~-----
8
:::::::;::::::;;1;:_;::::
om
| ' * " l " "
Inputic
_...|
I...
._._
-----------..-.._...__.._-.._--
D
Clock
'
'
Enable?
'
I
.
Enom,
_
|
_____
"1
V]
QA
_+
,
_____
,
_ _
_
____
,
O
B______
|
Outpu
o c _ _ _ _ _ _ _ _
jjj-
---:T
§
1
Curry
f
;
I2
I3
I i
i ;C U"'i-L-lnnioaf
Clear
Preul
5-38
Binary
Counter
C|ear))
E n o m
Qc
OD
T
Load
U!
ll
Il
ll
oc
Oo
r
LW
c
D
P
B
B
El
C
0
Emu.
GND
P
input
'
'----~----------_-_
-_
..._
__
____
_
____
____
'
I
Q
f-LL
:
'
i
|
l
IA
I5
0
|
2|
5-37
16
Synchronous
function.
_This
counter
is
1
preset
programmable,
with
synchronization
the
orad
input,
to
be
matched
with
input
enable
input
regardless
_
_
synchronous
function
Lock
is
n
I
and
if
the
clock
input
as
||
becomes
L
at
output
I
this
it
has
In
case,
input
level.
with
digit
counter
be
done
Preset
can
When
applying
clock.
which
data
is
outputted
clock;
data
next
at
level.
I
the
with
»
|
J.S"L';
each
flip
clock.
next
relation
which
no
pxeset
with
"L"
shoul
pulse
p
C § i C 3 C i §
,./

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