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6-4-3
Signals
System
chart
of
Timing
system
signals
timing
each
is
in
IC42
inputted
through
QA,
QB...QH.
The
made.
general
method
is
explained
(40ch:
(1)
CHRCK
The
signal
to
and
video
block
CRTC
is
used
of
IC42
QC
QG.
(40ch:
(2)
LOAD
the
used
for
is
LOAD
character
display
to
information
and
colour
CRTC
versed
signal
of
LOAD,
synchronious
of
the
character
HD74LSl66P).
for
40
The
signal
80
characters
for
one
GRENBLE
(40ch:
(3)
control
The
signal
to
also
generator),and
signal
and
output
of
composed
output
(4)
CAS¢l
(IC28
The
give
signal
to
the
display
period
the
display
data
latch
IC42.
(5)
CAS¢2
(IC46
l3_pin)
The
signal
to
give
of
when
signal
MPU
E
control
of
Output
and
of
IC42.
QD
output
Pin)
(6)
RAS
(IC46
l
basic
The
signal
for
switch
of
the
RAM
(7)
MPU
DISPSW
(IC46
the
U09
Of
SlQn3lS_t
IC42
outputs.
Circuits
Generating
generating
signal
is
in
Fig.
charts
shifted
clock
by
combining
these
By
of
each
explanation
in
below.
8Och:
IC42
5
Pin,
of
the
number
set
generating
signal
and
for
80
characters,
IC45
6
Pin,
8Och:
latch
the
clock
to
used
unit.
Also,
display
to
is
signal
LOAD
parallel
is
composed
characters
is
and
from
QF
Pin,
8Och:
IC42
13
the
input
signal
the
to
overlap
prevent
character
generator
of
IC42,
and
80
QH
8_§in)
(column
CAS
signal
when
signal
(period
E
and
is
from
RAM
signal
the
CAS
to
is
H).
Also
used
in
the
data
store
RAM
the
RAS
(Row
Address
address.
Composed
Pin)
4
thg
make
RAM
address
written
is
circuit
(l.008
6-9.
E
signal
l6.l28
MCK,
generator
signals,
output
and
signal
system
Pin)
IC35
8
display
characters
40
block.
characters,
For
is
the
signal
IC35
6
Pin)
from
store
data
the
clock
to
for
unit.
character
the
mode
used
for
shift
8
bit
load
and
of
output
QD
QG.
10
Pin)
IC34
Enable
pin
the
to
the
of
output
The
s-gnal
output.
if
from
characters
of
address
signal
is
L).
of
MPU
of
output
composed
period
RAM
during
MPU
for
control
signal
as
a
and
colour
RAM.
of
Signal)
RAM.
RC
and
of
QA,
output
change,
composed
in
Fig.
6-8
and
MHZ)
which
is
then
outputted
signals
system
are
their
generating
inputting
to
by
output
composed
of
and
QC
and
colour
RAM
RAM
the
data
from
latch
the
Further,
re-
each
switch
of
117
(IC
register
IC42
and
of
QH
graphic
of
(output
the
graphic
of
character
for
40
and
QC
QG.
the
RAM
during
RAM)
to
clock
to
Used
as
a
and
of
QG
QB,
QE
time
(during
the
the
Input/
of
signal
Composed
E
used
for
the
Also,
of
IC42.
QG
of
and
of
QG
QB
is
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