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signals.
this
In
conversion
which
makes
it
possible
(2)
Data
bit
from
pin
input
(LOAD
signal)to
from
ICll7.
(3)
The
brightness
from
colour
RAM
at
ICl3l.
at
(4)
To
make
the
synchronization
ation
signal
from
colour
(DOT
CK
signal)
of
(R~BK,
G-BK,
B-BK)
brightness_signal
at
7
pin
and
B
signal
in
ICl32,
colour
display
display
connector;
(5)
R,
G,
B
signals
ICl32
and
ICl35,
at;/A
signals
outputted
are
(6)
On
the
hand,
synchronous
MHzl
signal
from
MPU
IC96
putted
to
pin
2 D i 1 - i § ' 1
,,-
§§
DD,
m
(0
Normal
l
character
sis
and
data
Fig.643
The
Mode
Display
"
'
@g§§§gQ§§Ø
_
Mode
Graphic
Normal
High
Resoluti
A
period,
shift/Load
video
to
output
colour
makes
the
RAM
synchronize
is
combined
signal
ICl36
combined
then
I
with
timing
RAM,
ICll6.
Then,
after
of
ICll8
and
colour
l
pin
input,
output
to
9
pin
of
ICll8
are
colour
signals
raw
with
composed
are
converter
then,
to
mono-chrome
video
signal
is
and
H
SYNC
signal
width
pulse
as
3
=
aDiv-.LSQH
/,,-
@@M@Q5M@
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lllllllll
'f------'
Hlllllll
Ill-I-I-I
WEBER
(M
High
Mode
(correspondence
area
bit)
Relationship
between
Graphic
resolutlc
40
80x
ch
100
H
v
I
90ch
160><
H
V100
I
40 h
320><
vzoo
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I
Boch
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I
signals
inputted
are
signal
during
display
timing
each
per
with
brightness
signal
with
display
reverse
with
display
cursor
this
brightness
signal
is
set
each
l
dot
per
switching
of
background
signal
(R,
B)
G,
of
G
signal
to
done.
After
reverse
R,
G,
B
are
synchronous
signal,
after
impedance
terminal.
counted
by
synchronizing
in
from
CRTC
ICl34,
horizontal
4ps
synchronous
Resolution
Mode
between
graphic
and
display
mode
ir
Display
'
RAM
Capacity
I
1000Byte
zoooayte
3000
Byte
15000Byte
1
ICll7
15
pin
to
period.
l
character
at
1c115
which
derived
was
signal
(REV
signal)
signal
(CUR
DISP
and
inform-
colour
input
6
at
pin
colour
signal
of
colour
RAM
to
4
pin,
R
signal
to
buffering
these
outputted
to
colour
which
made
from
are
conversion
Q5,
these
the
E
(1,008
ICl35,
then
out-
signal.
mode
resolution
graphic
9
signal
signals
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