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2.14
FGPA XC3S200AN
For FPGA design, Xilinx XC3S200AN is implemented on DSPC-8682 for the power control, DSP boot
configurations, programming clock generators and clock buffers and reset events for DPS farm.
With the programmed FPGA on DSPC-8682, below functions are provided.
DSP boot mode setting
Power sequences control
Enabling / Disabling the device power to meet the power sequence requirement.
Reset methodology control
Asserting / De-asserting RESET signals to each chip respectively.
Configure the clock generator
Other control functions
Below figure describes the FPGA connection on DSPC-8682.
Figure15: Hyperlink connection
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