Intel 80331 Design Manual page 16

Intel® 80331 I/O Processor Design Guide
Introduction
Figure 1
®
Figure 1. Intel 80331 I/O Processor Functional Block Diagram
Interrupt
Controller
& Timers
16
provides a block diagram of the 80331.
®
Intel XScale™
Core
Bus Interface
Unit
Internal Bus
2 Channel
Application
DMA
Accelerator
Controller
Primary PCI Bus
16-bit
32/64-bit DDR
PBI
Interface
Memory
Controller
Message
ATU
Unit
PCI-to-PCI
Bridge
UART 2 - 1²C
Units Units
GPIO
BRG
Arbiter
Secondary PCI Bus
B2472-01