Icom ID-RP2 Service Manual page 63

4-1-5 DEMODULATOR CIRCUITS (MAIN-D UNIT)
The MSK receiver IC (IC271) contains the limiter amplifi er,
quadrature detector, etc.
The amplifi ed 2nd IF signal from the IF amplifi er (Q271) is
applied to the limiter amplifier section of the MSK receiver
(IC271, pin 7) and then applied to the quadrature detector
section (IC271, pin 11) to demodulate to the data signals.
The demodulated data signals are output from pin 13 of the
MSK receiver (IC271) and are amplified at IC343 (pins 1,
2). The amplified signals are switched at the mode switch
(IC342, pins 1, 6) and then applied to the LOGIC-D unit via
J1801 (pin 20).
4-1-6 DIGITAL CIRCUITS (LOGIC-D UNIT)
The digital circuits convert the demodulated data signals for-
mat for communication to the repeater controller (ID-RP2C).
The demodulated data signals from the mode switch
(MAIN-D unit: IC342, pin 1) are applied to the GMSK
MODEM (IC150, pin 11). The applied signals are synchro-
nized with the clock signal, then the synchronized signals
are applied to the CPU (IC50) via the FPGA IC (IC200).
The output signals from the CPU (IC50) are applied to the
buffer amplifi er (IC901) and then applied to the REAR unit
via J901.
The amplifi ed signals are applied to the connected repeater
controller (ID-RP2C) via [CONT I/O] (REAR unit; J2).
• DIGITAL CIRCUITS
From
demodulator
circuit (IC271)
To modulator
circuit (IC831)
RECEIVED SIGNAL
GMSK
FPGA
MODEM
IC200
IC150
BASEBAND
FILTER
D - 4 - 2
4-2 TRANSMITTER CIRCUITS
4-2-1 DIGITAL CIRCUITS (LOGIC-D UNIT)
The digital circuits convert the data signals form for transmit.
The data signals from the connected repeater controller
(ID-RP2C) are applied to the buffer amplifier (IC901) and
then applied to the CPU (IC50) via [CONT I/O] (REAR unit;
J2).
The applied data signals to the CPU (IC50) are processed
and then applied to the FPGA IC (IC200) to split to the I
and Q baseband signals for quadrature modulation. The
I/Q baseband signals output from pins 75–80, 82–89, 92–
99 (IC200) and then applied to the D/A converters (R250–
R293).
The converted signals are passed through the baseband
fi lter (IC300–IC302) and then applied to the MAIN-D unit via
J400 (pins 1, 3).
4-2-3 MODULATION CIRCUIT (MAIN-D UNIT)
The modulation circuit modulates the 2nd LO signal at the
quadrature modulation circuit (IC890) using the I/Q base-
band signals.
The I/Q baseband signals from the LOGIC-D unit are ampli-
fied at the I/Q baseband amplifiers (IC832, pins 1, 2, 6, 7)
and then applied to the amplifier section of the quadrature
modulator (IC890, pins 4, 7). The 2nd LO signal is also
applied to the ±45° phase splitter section of the quadrature
modulator (IC890, pin 8) and then the ±45° phase shifted
and split LO signals are applied to the LO amplifier sec-
tions. The amplified LO signals are modulated with the I/Q
baseband signals at the I/Q modulator sections and then
combined at combining amplifier section. The modulated
signal is output from pin 14 (IC890) after amplified at the RF
amplifier section.
The modulated signal is passed through the bandpass
(FI880) and low-pass (L892, L893, C904–C908) fi lters and
then applied to the 1st mixer circuit.
ID-RP2D
LOGIC-D unit
BUFFER
CPU
IC50 AMP
IC901
TRANSMIT SIGNAL
ID-RP2C