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BS0
BS
INT
SDIO
SCLK
Figure 21-7. Memory Stick Bus Four State Access Protocol
I/O Host
Signal
(MSHC) Side
MS_SDIO
Input/Output
MS_PI0
Input
MS_BS
Output
MS_PI1
Input
MS_SCLKI
Input
MS_SCLKO
Output
(Serial Clock)
State
MS_BS
BS0
LOW
BS1
HIGH
BS2
LOW
Hand Shake State (Read Protocol)
Data Transfer State (Write Protocol)
BS3
HIGH
Data Transfer State (Read Protocol)
Handshake State (Write Protocol)
Memory Stick usually operates in Four State Access Mode from BS0 through BS3. However, when an
error occurs during packet communication, the mode is shifted to Two State Access Mode in which states
BS0 and BS1 are automatically repeated to avoid bus collision on SDIO. See Section 21.8.3, "Transfer
Protocol Command (TPC)."
MOTOROLA
BS1
TPC
Data or RDY/BSY
Table 21-18. Serial Interface Signal Specifications
Serial Data Bus. The direction of the data and the data itself changes at each Bus
State. Data is 8 bit, MSB first.
Parallel Port Data Input. Memory Stick Insertion/Extraction detect 0.
Indicates Bus State (0:3) on SDIO and its timing of starting transfer.
Parallel Port Data Input. Memory Stick Insertion/Extraction detect 1.
External Clock input to the serial clock generation circuit.
Signal on MS_BS and MS_SDIO is output on trailing edge and input (latched) at
leading edge. It is always output except during BS0 period.
Table 21-19. Four State Access Mode
State Name
INT Transfer State
TPC State
Memory Stick Host Controller (MSHC) Module
BS2
BS3
RDY/BSY or Data
Description
Description
A state in which packet communication is not active,
and (MS_SDIO) is used as a transmission line for INT
signals (interruption)
Packet Starts and transfers Transfer Protocol
Command (TPC) from MSHC module to Memory
Stick
Waiting for RDY signal
Transferring data to Memory Stick
Reading data from Memory Stick
Waiting for RDY signal
Programmer's Reference
BS0
INT
21-25
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