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POWER UP TESTING AND INITIALIZATION
Self Test
61200.129L1-1
When shipped from the factory, the TSU 120 is set to
factory default conditions. At the first application of
power, the unit automatically executes a memory self
test. A full self test can be run from the front panel,
and a pass code and unit ID may be set using the UTIL
menu.
Upon a power-up, the LCD displays Memory Test
Now Testing and the Test LEDs are illuminated.
When the self test is completed with no failures
detected, the OK LED lights up and the LCD momen-
tarily displays All Tests Passed. If a failure is detected
a list of failures is displayed in the LCD window. The
full self test procedure (invoked from the front panel
or T-Watch) consists of the following steps:
1.
Board level tests. Each of the TSU 120 board
contains an on-board processor which executes a
series of tests checking the circuitry on the board.
a. RAM tests; EPROM checksum
b. DS0 map tests
c. On-board data path. Sending a known test
pattern through an on-board loop.
2.
Unit level tests.
a.
Front panel LED verification
b. Phase locked loop verification
c.
Board-to-board interface test. A test pattern is
sent from the controller through a loopback on
all other boards and checked on the controller.
This verifies the data path, clocks, and control
signals.
TSU 120 User Manual
Chapter 2. Installation
3 1
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