Figure 7-3. Drive Level And Measurement Points For Switching Characteristics; Table 7-8. System Interface Signals - AMD Geode LX 600@0.7W Data Book

33234H
Symbol Parameter
t SYSREF Cycle time
CK
t SYSREF High time
CH
t SYSREF Low time
CL
t RESET# Setup time to SYSREF
SU1
t RESET# Hold time from SYSREF
H1
t CIS Setup time to SYSREF
SU2
t CIS Hold time from SYSREF
H2
t IRQ13 Valid Delay time from SYSREF
VAL1
t SUSPA# Valid Delay time from SYSREF
VAL2
t V and V
ON IO MEM
t MVREF power on after V
MVON
t Reset Active time after SYSREF clock stable
RSTX
t Output drive delay after RESET# released
Z
Note 1. RESET# is asynchronous. The setup/hold times stated are for testing purposes that require sequential repeatabil-
ity.
Note 2. For proper powerup of DRGB and flat panel controls, V
last.
SYSREF
Outputs
Inputs

Figure 7-3. Drive Level and Measurement Points for Switching Characteristics

608

Table 7-8. System Interface Signals

power on after V
CORE
MEM
t
CH
t Min
VAL1,2
Valid Output
n
Min
15.0
6.0
6.0
3
1
3.0
0
2.0
2.0
0
0
100
must power up after V
IO
t
CK
t
CL
t Max
VAL1,2
Valid Output
n+1
t
SU1,2
Valid Input
Electrical Specifications
Max Unit Comments
INF ns 66 MHz
ns 40% t
ns 40% t
ns Note 1
ns Note 1
ns
ns
6.0 ns
6.0 ns
100 ms Note 2
100 ms
us For PLL lock
20 ns
. Otherwise, V
CORE CORE
50%
50%
t
H1,2
50%
AMD Geode™ LX Processors Data Book
CK
CK
can be