Table 6-44. Timing Register Settings For Interlaced Modes - AMD Geode LX 600@0.7W Data Book

Display Controller

Table 6-44. Timing Register Settings for Interlaced Modes

Timing Set Parameter
Formula
V_Active_End
V_Total
V_Sync_Start
V_Sync_End
525
V_Active_End
V_Total
V_Sync_Start
V_Sync_End
625
V_Active_End
V_Total
V_Sync_Start
V_Sync_End
720i
V_Active_End
V_Total
V_Sync_Start
V_Sync_End
1080i
V_Active_End
V_Total
V_Sync_Start
V_Sync_End
1080i 50 Hz
V_Active_End
V_Total
V_Sync_Start
V_Sync_End
AMD Geode™ LX Processors Data Book
Odd Register
(odd_active-1)
(odd_active + odd_fp + even_bp - 1)
(odd_active + odd_fp - 1)
(odd_active + odd_fp + odd_vsync - 1)
F1
106
F5
F6
11F
138
121
122
167
177
16A
16B
21B
232
21E
21F
21B
270
220
221
33234H
Even Register
(even_active-1)
(even_active + even_fp + odd_bp - 1)
(even_active + even_fp - 1)
(even_active +even_fp + even_vsync - 1)
F0
105
F5
F6
11F
137
121
122
167
177
169
16A
21B
231
21D
21E
21B
270
220
221
299