Reset Inverter - Hitachi L300P Series Instruction Manual

Three-phase input 200v class; three-phase input 400v class;
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4–26
Using Intelligent Input Terminals

Reset Inverter

The [RS] terminal causes the inverter to
execute the reset operation. If the inverter is
in Trip Mode, the reset cancels the Trip
state. When the signal [RS] is turned ON
and OFF, the inverter executes the reset
operation. The minimum pulse width for
[RS] must be 12 ms or greater. The alarm
output will be cleared within 30 ms after the
onset of the Reset command.
WARNING: After the Reset command is given and the alarm reset occurs, the motor will
restart suddenly if the Run command is already active. Be sure to set the alarm reset after
verifying that the Run command is OFF to prevent injury to personnel.
Opt.
Symbol
Function Name
Code
18
RS
Reset Inverter
C001, C002, C003, C004,
Valid for
C005
inputs:
B003, B007, C102, C103
Required
settings:
Notes:
• When the control terminal [RS] input is
already ON at powerup for more than 4
seconds, the remote operator display is "R-
ERROR COMM<2>" (the display of the
digital operator is – – – –). However, the
inverter has no error. To clear the digital
operator error, turn OFF the terminal [RS]
input and press one of the operator keys.
• The active edge (leading or trailing) of the [RS] signal is determined by the setting of
C102.
• A terminal configured with the [RS] function can only be configured as a normally open
contact. The terminal cannot be used in the normally closed contact state.
• When input power is turned ON, the inverter performs the same reset operation as it does
when a pulse on the [RS] terminal occurs.
[RS]
Alarm output
Input
Description
State
ON
The motor output is turned OFF, the Trip
Mode is cleared (if it exists), and powerup
reset is applied
OFF
Normal power-on operation
Example: (Default input configuration
shown—see page 3–43. Jumper posi-
tion shown is for –xFU/-xFR models;
for –xFE models, see page 4–11.)
TH
FW
5
P24
PLC
CM1
See I/O specs on page 4–8.
12 ms
minimum
approx. 30 ms
t
RS
4
3
2
1

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