Epson LQ-2550 Technical Manual page 91

Power ON/OFF
2.3.1.2
Figure 2-36 shows the reset circuit and Figure 2-38 shows the waveform of this operation.
When
the power is switched on and Vx rises, voltage is applied to the integration circuit (composed
of R 120, D 14). The voltage at C66 increases according to VTHLD
in the MMU sets the ROUT signal high (Figure 2-38, TR1). The reset (ROUT) signal is sent to the IC'S on
the ROMA board and to the outside via CN2.
When the power is switched off, the voltage at C66 decreases according
when V
N
the ROUT signal low. (Dl 4 is a diode used to discharge C66).
Vx
THLD
ROUT
the output switches from high to low, and the reset circuit
AT POWER ON
( v )
I
5
0
I
T
RI
I
5
I
I
I
0
I
1
RESET
Figure 2-38. Power ON
=
AT POWER OFF
CPU O P E R A T E S
Reset
Timing
2-44
Vx (1-e-n) and the reset circuit
to VTHLD = Vx (e-n-l) and,
in the MMU sets
I
I I
I
—
RESET
.