Epson LQ-2550 Technical Manual page 247

A . 1 . l . l HD64180
The HD64 180 is an 8-bit one-chip CPU, and is software compatible with model 2-80 and higher models.
The chip includes a DMA controller (DMAC), asynchronous serial communication interface (ASCI) (2
channels), serial 1/0
CPU.
the
The main features are as follows:
physical address space
MMU: 5 12K-byte
DMAC (2 channels): High speed data transfer between memories (including memory mapped 1/0)
. ASCI (2 channels): Start-stop asynchronous system (full duplex) SCI modem control signals
CS 1/0 port ( 1 channel): Serial to parallel conversion shift register
. 16-bit timer (2 channels): Pulse output function
. Interrupts: Internal (4), external (8)
Bus I/F: 80 CPU-line bus l/F
Dynamic RAM refresh controller: Programmable refresh interval
Low speed memory input/output I/F: Programmable number of weight states
Built-in clock oscillator circuit
CMOS
Figures A-1 and A-2 show the pin diagram and internal block diagram. Table A-2 shows the terminal
functions.
and timers (one with internal and one with external output), in addition to
Figure A-1. HD64180 Pin Diagram
A-2