Mitsubishi Electric MELSEC iQ-R C Series Programming Manual page 42

Controller module
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Device
Fixed cycle communication area (CPU No.3
area)
Fixed cycle communication area (CPU No.4
area)
Other station buffer memory
Other station random access buffer
Remote input for CC-Link
Remote output for CC-Link
Other station link register
Link special relay for CC-Link
Link special register for CC-Link
Global label
Safety input
Safety output
Safety internal relay
Safety link relay
Safety timer
Safety retentive timer
Safety counter
Safety data register
Safety link register
Safety special relay
Safety special register
*1 The following CPUs are accessible:
Q12DCCPU-V with a serial number of which the first 5 digits are '12042' or later
Q24DHCCPU-V, Q24DHCCPU-LS, Q24DHCCPU-VG, and Q26DHCCPU-LS
*2 Q00JCPU is not accessible.
*3 The following CPUs are accessible:
Q12DCCPU-V (Extended mode)
Q24DHCCPU-V, Q24DHCCPU-LS, Q24DHCCPU-VG, and Q26DHCCPU-LS
*4 A message is send to a network module on the other station via a MELSECNET/H network module.
Access to a multiple CPU system (when a logical station number is specified) is not available.
*5 To directly access link devices, access them as link direct devices (J\) depending on network module specifications. An access
target device varies depending on a device number to be specified. Therefore, a device number which is actually accessed may be
different from the specified device number.
For specification method for accessing link direct devices (J\) using MELSEC data link functions, refer to the following:
MELSEC iQ-R C Controller Module User's Manual
1 COMMON ITEMS
40
1.3 MELSEC Data Link Functions
Access method
U3E2\HG
Batch
Random
U3E3\HG
Batch
Random
Batch/random
Batch/random
RX
Batch/random
RY
Batch/random
Batch/random
SB
Batch/random
SW
Batch/random
GV
Batch
Random
SA\X
Batch/random
SA\Y
Batch/random
SA\M
Batch/random
SA\B
Batch/random
SA\T
Batch/random
SA\ST
Batch/random
SA\C
Batch/random
SA\D
Batch/random
SA\W
Batch/random
SA\SM
Batch/random
SA\SD
Batch/random
Access target CPU
(1)
(2)
(3)
(4)
(5)
(6)

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