Mitsubishi Electric MELSEC iQ-R C Series Programming Manual page 41

Device
Long counter (Coil)
Timer (Current value)
Long timer (Current value)
Counter (Current value)
Long counter (Current value)
Data register
Special register
Index register
Long index register
File register
Refresh data register
Link relay
Link register
Link special relay
Retentive timer (Contact)
Long retentive timer (Contact)
Retentive timer (Coil)
Long retentive timer (Coil)
Link special register
Edge relay
Own station random access buffer
Retentive timer (Current value)
Long retentive timer (Current value)
Own station link register (for sending)
Own station link register (for receiving)
Own station buffer memory
SEND function (with arrival confirmation)
SEND function (without arrival confirmation)
*5
Link direct device (link input)
*5
Link direct device (link output)
*5
Link direct device (link relay)
*5
Link direct device (link register)
*5
Link direct device (link special relay)
Link direct device (link special register)
Intelligent function module device, module
access device
CPU shared memory, CPU buffer memory (CPU
No.1 area)
CPU shared memory, CPU buffer memory (CPU
No.2 area)
CPU shared memory, CPU buffer memory (CPU
No.3 area)
CPU shared memory, CPU buffer memory (CPU
No.4 area)
Fixed cycle communication area (CPU No.1
area)
Fixed cycle communication area (CPU No.2
area)
Access method
LC Batch/random
T Batch/random
LT Batch/random
C Batch/random
LC Batch/random
D Batch/random
SD Batch/random
Z Batch/random
LZ Batch/random
R Batch/random
ZR Batch/random
RD Batch/random
B Batch/random
W Batch/random
SB Batch/random
ST Batch/random
LST Batch/random
ST Batch/random
LST Batch/random
SW Batch/random
V Batch/random

Batch/random
ST Batch/random
LST Batch/random
 Batch/random

Batch/random

Batch/random
*4

Batch
Random
*4
 Batch
Random
Jn\X Batch/random
Jn\Y Batch/random
Jn\B Batch/random
Jn\W Batch/random
Jn\SB Batch/random
*5
Jn\SW Batch/random
Un\G Batch/random
U3E0\G Batch
Random
U3E1\G Batch
Random
U3E2\G Batch
Random
U3E3\G Batch
Random
U3E0\HG Batch
Random
U3E1\HG Batch
Random
Access target CPU
(1) (2) (3)
  
  
  
  
  
*1
  
*1
  
  
  
*2
  
*2
  
  
*3
  
*3
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
*4
  
*4
  
*4
  
*4
  
*1
  
*1
  
*1
  
  
 
  
 
  
 
  
 
  
  
1.3 MELSEC Data Link Functions
(4) (5) (6)
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  

  

  

  

  

  

1 COMMON ITEMS
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