Read Data (N Read Data); Write Protect Schematic Diagram - Tandon TM-100-1 Operating And Service Manual

WRITE
PROTECT
SWITCH O
NO
Circuit Description
2F
+5V
R64
1K
TP9
11
°
4 10
RP1
13
12
150 ,------------'-',:3tl:>0-----,
04
Figure 3-12
Write Protect Schematic Diagram
DRIVE
SELECT
4 38
5 1F
The Write Protect signal comes in at Connector 8. Test Point 9 is held low when the switch is closed by a non-write
protected diskette. The Write Protect output at Pin 28 of the interface is enabled at IC1F, Pins 4, 5, and 6, by the
Drive Select signal.
3.3.2.4 Read Data (N READ DATA)
Functional Description
The Read Data interface line transmits the readback data to the controller when the disk drive is selected . It pro-
vides a pulse for each flux transition recorded on the media. The Read Data output line goes true (low) for a dura-
tion of one (1) usec for each flux change recorded.
The leading edge of the Read Data output pulse represents the true positions for the flux transitions on the
diskette surface.
Test Point 1 and Test Point 2 (see Figure 3-13) are provided to observe the differential output of the first stage of
Read signal amplification. Test Point 3 and Test Point 4 are provided to observe the differential output of the
second stage amplifier and differentiated Read signal. Test Point 5 is the output of the single shot used in the
Read section, nominally 1.0 usec for each flux transition detected . Test Point 10 is signal ground.
Circuit Description
The read signal comes from the selected head on the disk drive. It is gated to the first amplifier (IC 3A) by the N
WRITE signal to IC 28, Pin 11 and Pin 10, which forward-biases diodes CR 11 and CR12. Then the Read signal
passes through C2, L 1, L2, C3, C4, and C5, which is a bandpass filter. The Read signal is then at the input IC 4A,
the differentiator, which is also Test Point 1 and Test Point 2.
The output of IC 4A goes through DC blocking capacitors C7 and
ca
to the crossover detector, IC 58, which dig-
itizes the AC signal. This puts the signal into a standard TTL format. IC's 50 , 5E, and 5C comprise a comparator
circuit. Any pulses that occur outside of the normal duty cycle of IC 58 are eliminated. IC 50 is an edge detector.
IC 5E acts as a one-shot. IC 5C is the actual 9omparator.
3-15