JETWAY J-Mark J-530CF Manual page 24

• SDRAM WR Retire Rate: The system designer must select the correct timing for
data transfers from the write buffer to memory, according to DRAM specifications
The choice: X-1-1-1, X-2-2-2.
• DRAM Opt RAS Precharge: The precharge time is the number of cycles it takes for
the RAS to accumulate its charge before DRAM refreshes. If insufficient time is
allowed, refresh may be incomplete and the DRAM may fail to retain data.
The choice: Enabled, Disabled.
• PCI Peer Concurrency : Peer concurrency means that more than one PCI device
can be active at a time.
The choice: Enabled, Disabled.
• Read Prefetch Memory RD : When this item is Enabled, the system is allowed to
prefetch the next read instruction and initiate the next process.
The choice: Enabled, Disabled.
• Assert TRDY After Prefet : When you select 1QWs, SiS530 asserts its first TRDY#
for 1 transaction after it prefetched 1 quadword of data from system memory.
Otherwise, SiS530 asserts its first TRDY# after 2 quadwords are prefetched.
The choice: 1QWs, 2QWs.
• CPU to PCI Burst Mem. WR : Select enabled permits PCI burst memory write cycles,
for faster performance. When disabled, performance is slightly slower, but more
reliable.
Choices are Enabled, Disabled.
• CPU to PCI Post Write : Select enabled to use a fast buffer for posting writes to
memory. Using a fast buffer releases the CPU before completion of a write cycle to
DRAM.
The choice: Enabled, Disabled.
• Linear Mode SRAM Support : Select Enabled if your system contains a CPU that
requires linear mode (e.g., Cyrix M1/M2 CPU).
The choice: Disabled, Enabled.
• ECC Function Support : Enable/Disable the ECC (error-correcting code) function
support.
The choice: Enabled, Disabled.
• AGP Aperture Size : Select the size of the Accelerated Graphics Port (AGP) aperture.
The aperture is a portion of the PCI memory address range dedicated for graphics
memory address space. Host cycles that hit the aperture range are forwarded to the
AGP without any translation. See www.agpforum.org for APG information.
The choice: 4 MB, 8MB, 16 MB, 32 MB, 64 MB, 128 MB, 256MB.
• System BIOS Cacheable : Selecting Enabled allows caching of the system BIOS
ROM at F0000h-FFFFFh, resulting in better system performance. However, if any
program writes to this memory area, a system error may result.
The choice: Enabled, Disabled.
• Video BIOS Cacheable : Selecting Enabled allows caching of the system BIOS ROM
at C0000h-F7FFFh, resulting in better system performance. However, if any program
writes to this memory area, a system error may result.
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