National Instruments PCI-6251 User Manual page 264

Figure B-50 and Table B-34 show the output delays.
Time
t
10
t
11
t
12
t
13
Gating Modes
Gating mode refers to how the counter/timer uses the Gate input. Some timing operations depend
on the gating mode. Depending on the application, the counter/timers either level gating mode
or edge gating mode.
In NI-DAQmx, the counter/timers use level gating mode for the following measurements:
• Edge counting
• Pulse width measurements
• Two-signal edge separation measurements
All other measurements use edge gating mode.
Figure B-50. Output Delays
Selected Source
Out_o
PFI, RTSI
(Counter n Internal Out)
PFI, RTSI
(Counter n Source)
Selected Gate
PFI, RTSI
(Counter n Gate)
Table B-34. Output Delays Timing
Line
—
PFI
RTSI
PFI
RTSI
PFI
RTSI
t
10
t
11
t
12
t
13
Min (ns)
1.0
7.5
6.5
8.5
7.5
7.5
6.5
© National Instruments | B-39
M Series User Manual
Max (ns)
4.0
28.2
18.0
32.2
22.0
28.7
18.0