National Instruments PCI-6251 User Manual page 248

Table B-14. Sample Clock Timebase and the Sync Sample Clock Timebase Timing
Time From
t Signal_i
4
t Signal_i
5
Start Trigger
As an output, the Start Trigger is routed as an asynchronous pulse. The actual signal that gets
routed is the Selected Start Trigger signal, so there is no synchronous delay involved.
Signal_i
Sync Sample Clock Timebase
Sync Sample Clock Timebase
Table B-15. Start Trigger Timing from Signal_i to Selected Start Trigger
Time
t
6
Time
t
7
t
8
Pause Trigger
The analog output Pause Trigger can be used to pause an ongoing generation. It is received on
the rising edge of Sync Sample Clock Timebase.
Sample Clock Timebase
Sync Sample Clock Timebase
Figure B-26. Start Trigger Input Delay Path
Logic
Selected Start
Trigger
Figure B-27. Start Trigger Timing Diagram
Signal_i
Selected Start Trigger
From
Signal_i Selected Start Trigger
Table B-16. Start Trigger Setup and Hold Timing
Parameter
Setup
Hold
To
D Q
t
6
t
7
t
8
To
Min (ns)
1.5
0
M Series User Manual
Min (ns) Max (ns)
2.4
2.4
To Internal Logic
Min (ns) Max (ns)
2.9
Max (ns)
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© National Instruments | B-23
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