Counter Area; Dm And Em Areas - Omron SYSMAC CVM1 Series Operation Manual

DM and EM Areas

3-8

Counter Area

3-9

DM and EM Areas

60
quire bit data or for operands that require word data. When designated as an
operand that requires bit data, the timer number accesses the Completion Flag
of the timer. The Completion Flag will be ON when the timer has timed out. When
designated as an operand that requires word data, the timer number accesses a
memory location that holds the PV of the timer.
Timer PVs are reset when PC operation is begun, when the CNR(236) instruc-
tion is executed, and when in interlocked program sections when the execution
condition for IL(002) is OFF. Refer to 5-8 Interlock and Interlock Clear – IL(02)
and ILC(03) for details on timer operation in interlocked program sections.
Timer Completion Flags are allocated to internal I/O memory addresses (bit ad-
dresses) F000 through F3FF, corresponding to timer numbers T0000 through
T1023. Timer PVs are allocated to internal I/O memory addresses (word ad-
dresses) 1000 through 13FF, corresponding to timer numbers T0000 through
T1023. Completion Flags and PVs can be accessed directly with their internal
I/O memory addresses, but they are normally accessed by using the timer num-
bers in the program.
All timer instructions can be affected by the cycle time. Refer to 5-13 Timer and
Counter Instructions for details.
Counter Completion Flags and present values (PV) are accessed through
counter numbers ranging from C0000 through C1023. Each counter number
and its set value (SV) are defined using counter instructions. No prefix is re-
quired when using a counter number to create a counter in a counter instruction.
The same counter number can be defined using more than one of these instruc-
tions as long as the instructions are not executed in the same cycle. If the same
counter number is defined in more than one of these instructions or in the same
instruction twice, an error will be generated during the program check, but as
long as the instructions are not executed in the same cycle, they will operate cor-
rectly. There are no restrictions on the order in which counter numbers can be
used.
Once defined, a counter number can be designated as an operand in one or
more of certain instructions other than those listed above. Counter numbers can
be designated for operands that require bit data or for operands that require
word data. When designated as an operand that requires bit data, the counter
number accesses the completion flag of the counter. When designated as an
operand that requires word data, the counter number accesses a memory loca-
tion that holds the PV of the counter.
Counter PVs are reset when the CNR(236) instruction is executed, but unlike
timers, counters maintain their status when PC operation is begun, and when in
interlocked program sections when the execution condition for IL(002) is OFF.
Counter Completion Flags are allocated to internal I/O memory addresses (bit
addresses) F800 through F8FF, corresponding to counter numbers C0000
through C1023. Counter PVs are allocated to internal I/O memory addresses
(word addresses) 1800 through 1BFF, corresponding to counter numbers
C0000 through C1023. Completion Flags and PVs can be accessed directly with
their internal I/O memory addresses, but they are normally accessed by using
the counter numbers in the program.
The DM (Data Memory) Area is used for internal data storage and manipulation
and is accessible only by word. Addresses range from D00000 through D24575.
The EM (Extended Data Memory) Area is contained in the CV1000-DMjj1
EM Unit, a card which must be purchased separately and installed into a slot on
Section 3-9