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4.
Counter Operation
Counter direction
specification input
Counter input
Reset input
Set value
Present value
0000
Counter bit
5.
8-digit Counter Operation
Count speed
H
High
Counter direction
speed
specification input
Counter input
Reset input
L
Low
Set value
speed
Present value
00000000
Counter bit
Counting Speed of the 8-digit Counter
The maximum counting speed of the 8-digit counter is 150 Hz. When the ladder program volume is large, however, this speed will be less than 150
Hz. Calculate the cycle time and confirm the maximum counting speed using the following formula. The calculation serves as a guide only, so allow
a suitable margin in the actual machine.
Maximum counting speed = 1,000,000 Hz/
Note: Even if the calculated maximum counting speed exceeds 150 Hz using this formula, the maximum counting speed will be 150 Hz.
Cycle Time Calculation Method
Cycle
=
Common
+
Processing time taken
time
processing
when Expansion I/O
(µs)
time
Units are connected
Refer to the following table for ZEN execution times. The execution times are provided as a guide. External factors, button operations, execution of
ZEN Support Software operations, and timing of the processing affects the actual processing times.
Common Processing Time
Unit type
Standard LCD-type CPU Units,
Economy-type CPU Units, and
Communications-type CPU Units
LED-type CPU Units
Expansion I/O Unit Processing Time
Unit type
160 µs per Unit
Expansion I/O Units
Communications Processing Time (only for CPU Units with
Communications)
Reading information
Writing set values
Writing time information
Cycle time (µs) × 2.2
+
Ladder program
execution time
Common processing time
850 µs
200 µs
Expansion I/O Unit processing time
170 µs
Twin timer: 11,000 µs
Others: 6,000 µs
820 µs
The counter bit turns ON when the counter value (present value)
reaches the set value (present value ≥ set value). The counter returns to
0 and the counter bit turns OFF when the reset input turns ON. Count
inputs are not accepted while the reset input is turned ON. The counter
present value and counter bit (ON/OFF) are held even if the operating
mode is changed or the power supply is interrupted.
Operation
The counter bit turns ON when the counter value (present value)
reaches the set value (present value ≥ set value). The counter
returns to 0 and the counter bit turns OFF when the reset input
turns ON. Count inputs are not accepted while the reset input is
turned ON. The counter present value and counter bit (ON/OFF)
are held even if the operating mode is changed or the power supply
is interrupted.
High-speed Operation
For CPU Units with DC power supply, high-speed operation is
possible for input I0 only. (Maximum counting speed: 150 Hz)
Hz
+
Communications
processing time (only
for CPU Units with
communications)
Ladder Program Execution Time
Per line
Per output CPU Unit output bits (Q) 4 µs
Expansion I/O Unit
output bits (Y)
Work bits (M)
Holding bits (H)
Timers (T)/Holding
timers (#)
Counters (C)/8-Digit
Counters (F)
Display bits (D)
Weekly timers (@)
Calendar timers (*)
Analog comparators (A)
Comparators (P)
8-Digit Comparators (G)
ZEN V2 Units
30 µs: Line containing program
*1
7 µs: Empty lines
*2
15 µs
*3
13 µs
Hour and minute (CLK)/Year and
month (DAT)/Month and day
(DAT1): 21 µs
Timers (T)/Holding timers (#)/
Counters (C)/Analog
comparators: 28 µs
Characters (CHR)/8-Digit
Counters (F): 38 µs
4 µs
*4
1 µs
3 µs
7 µs
*5
4 µs
21
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