Omron CVM1D Manuals

Manuals and User Guides for Omron CVM1D. We have 2 Omron CVM1D manuals available for free PDF download: Operation Manual

Omron CVM1D Operation Manual

Omron CVM1D Operation Manual (476 pages)

Duplex System

Brand: Omron | Category: Controller | Size: 2.22 MB

Table of Contents

Table of Contents

10
- Precautions
  13
- Intended Audience
  14
- General Precautions
  14
- Safety Precautions
  14
- Operating Environment Precautions
  15
- Application Precautions
  15
- Conformance to EC Directives
  17
Section 1 Introduction

19
- Introduction
  19
- Overview
  20
- Relay Circuits: the Roots of PC Logic
  20
- OMRON Product Terminology
  21
- PC Terminology
  21
- Overview of PC Operation
  22
- Operating Modes
  23
- PC Operating Modes
  23
- RUN Output
  24
- Compatible Programming Devices
  25
- Programming Devices
  25
- Connecting Programming Devices
  26
- Recommended Programming Device Operations
  26
- Transferring Programs
  26
- CVM1D Program Memory
  27
- Related Manuals
  27
Section 2 Hardware Considerations

29
- Hardware Considerations
  29
- CPU Unit Switch Settings
  30
- Duplex Unit Switch Settings
  32
- EM Units
  35
- Memory Cards
  36
- Mounting and Removing Memory Cards
  36
- File Transfer between the CPU and Memory Card
  37
- Simplified Backup Function
  39
- I/O Control Unit and I/O Interface Unit Displays
  40
- Setting Rack Numbers
  40
Section 3 Memory Areas

43
- Memory Areas
  43
- Data Area Structure
  45
- Introduction
  45
- CIO (Core I/O) Area
  49
- I/O Area
  50
- Work Areas
  54
- Holding Area
  55
- Link Area
  55
- SYSMAC BUS/2 Area
  55
- Compobus/D Areas
  56
- CPU Bus Unit Area
  56
- SYSMAC BUS Area
  56
- CPU Bus Link Area
  57
- TR (Temporary Relay) Area
  57
- Auxiliary Area
  59
- Forced Status Hold Bit
  64
- IOM Hold Bit
  64
- CPU Bus Unit Restart Bits
  65
- Error Log Reset Bit
  65
- Output off Bit
  65
- SSS Flags
  65
- SYSMAC BUS Error Check Bits
  65
- Number of Power Interruptions
  66
- Power Interruption Time
  66
- Service Disable Bits
  66
- Start-Up Time
  66
- Error Log Area
  67
- Message Flags
  67
- CPU Bus Unit Initializing Flags
  68
- MACRO Input/Output Areas
  68
- Wait Flags
  68
- Alternate CPU Unit Status Flags
  69
- CPU Bus Unit Service Interval
  69
- Duplex Startup Error Flags
  69
- Memory Card Flags
  69
- Programming Device Flags
  69
- Duplex Verification Error Flags
  70
- Power Supply Unit Off/Error Flags
  70
- CPU Bus Error and Unit Flags
  71
- Cycle Time too Long Flag
  71
- Error Code
  71
- FALS Flag
  71
- I/O Setting Error Flag
  71
- Online I/O Replacement Flags
  71
- Program Error Flag
  71
- Too Many I/O Points Flag
  71
- Battery Low Flags
  72
- CPU Bus Unit Setting Error Flag and Unit Number
  72
- Duplex Bus Error Flag
  72
- Duplication Error Flag and Duplicate Rack/Cpu Bus Unit Numbers
  72
- I/O Bus Error Flag and I/O Bus Error Slot/Rack Numbers
  72
- Memory Error Flag
  72
- Power Interruption Flag
  72
- SYSMAC BUS Error Flag, Check Bits, and Master/Unit Numbers
  73
- SYSMAC BUS/2 Error Flag and Master/Unit Numbers
  73
- CPU Bus Unit Error Flag and Unit Numbers
  74
- Duplex Power Supply Error Flag
  74
- FAL Flag and FAL Number
  74
- I/O Verification Error Flag
  74
- Indirect DM BCD Error Flag
  74
- Jump Error Flag
  74
- Memory Error Area Location
  74
- Arithmetic Flags
  75
- CPU Bus Link Error Flag
  75
- CPU Bus Unit Number Setting Error Flag
  75
- CPU-Recognized Rack Numbers
  75
- Instruction Execution Error Flag, er
  75
- Maximum Cycle Time
  75
- Memory Card Start-Up Transfer Error Flag
  75
- Present Cycle Time
  75
- Clock Pulse Bits
  76
- First Cycle Flag
  76
- Step Flag
  76
- EM Status Flags
  77
- Network Status Flags
  77
- Timer Area
  77
- Counter Area
  78
- DM and EM Areas
  78
- Index and Data Registers (IR and DR)
  80
Section 4 Writing Programs

83
- Writing Programs
  83
- Basic Procedure
  84
- Instruction Terminology
  84
- Basic Ladder Diagrams
  85
- Basic Terms
  85
- Basic Mnemonic Code
  86
- Ladder Instructions
  87
- OUTPUT and OUTPUT NOT
  89
- Logic Block Instructions
  90
- Mnemonic Code
  90
- The END Instruction
  90
- Branching Instruction Lines
  97
- Coding Multiple Right-Hand Instructions
  97
- TR Bits
  98
- Interlocks
  100
- Jumps
  101
- Controlling Bit Status
  103
- DIFFERENTIATE up and DIFFERENTIATE down
  103
- SET and RESET
  103
- Keep
  104
- Self-Maintaining Bits (Seal)
  104
- Intermediate Instructions
  105
- Work Bits (Internal Relays)
  105
- Programming Precautions
  107
- Data Formats
  108
- Program Execution
  108
- Unsigned Binary Data
  108
- Signed Binary Data
  109
- BCD Data
  112
- Floating-Point Data
  112
- Signed BCD Data
  112
Section 5 Instruction Set

113
- Data Areas, Definers, and Flags
  118
- Instruction Format
  118
- Notation
  118
- Differentiated and Immediate Refresh Instructions
  121
- Coding Right-Hand Instructions
  123
- Ladder Diagram Instructions
  125
- LOAD, LOAD NOT, AND, and NOT, OR, and or NOT
  125
- CONDITION ON/OFF: up(018) and down
  127
- BIT TEST: TST(350) and TSTN
  128
- AND LOAD and or LOAD
  129
- Not: Not(010)
  129
- Bit Control Instructions
  130
- OUTPUT and OUTPUT NOT: out and out NOT
  130
- DIFFERENTIATE UP/DOWN: DIFU(013) and DIFD
  131
- SET and RESET: SET(016) and RSET
  133
- Multiple Bit Set/Reset: Seta(047)/Rsta
  134
- Keep: Keep(011)
  136
- INTERLOCK and INTERLOCK CLEAR: IL(002) and ILC(003
  138
- INTERLOCK and INTERLOCK CLEAR: IL(002) and ILC(003)
  138
- JUMP and JUMP END: JMP(004) and JME(005
  140
- JUMP and JUMP END: JMP(004) and JME(005)
  140
- Conditional Jump: Cjp(221)/Cjpn
  143
- Conditional Jump: Cjp(221)/Cjpn(222)
  143
- End: End(001)
  144
- Operation: Nop(000)
  144
- Timer and Counter Instructions
  145
- Timer: Tim
  147
- High-Speed Timer: Timh(015)
  151
- Accumulative Timer: Ttim(120)
  153
- Long Timer: Timl(121)
  155
- Multi-Output Timer: Mtim(122)
  156
- Counter: Cnt
  158
- Reversible Counter: Cntr(012)
  162
- Reset Timer/Counter: Cnr(236)
  163
- Shift Instructions
  165
- Shift Register: Sft(050)
  165
- Reversible Shift Register: Sftr(051)
  168
- Asynchronous Shift Register: Asft(052)
  169
- Word Shift: Wsft(053)
  171
- Shift N-Bit Data Left: Nsfl(054)
  172
- Shift N-Bit Data Right: Nsfr(055)
  173
- Shift N-Bits Left: Nasl(056)
  174
- Shift N-Bits Right: Nasr(057)
  175
- Double Shift N-Bits Left: Nsll(058)
  176
- Double Shift N-Bits Right: Nsrl(059)
  178
- Arithmetic Shift Left: Asl(060)
  179
- Arithmetic Shift Right: Asr(061)
  180
- Rotate Left: Rol(062)
  181
- Rotate Right: Ror(063)
  182
- Double Shift Left: Asll(064)
  183
- Double Shift Right: Asrl(065)
  184
- Double Rotate Left: Roll(066)
  185
- Rotate Left Without Carry: Rlnc(260)
  186
- Double Rotate Left Without Carry: Rlnl(262)
  187
- Double Rotate Right: Rorl(067)
  188
- Rotate Right Without Carry: Rrnc(261)
  189
- Double Rotate Right W/O Carry: Rrnl(263)
  190
- One Digit Shift Left: Sld(068)
  191
- One Digit Shift Right: Srd(069)
  192
- Data Movement Instructions
  193
- Move: Mov(030)
  193
- Move Not: Mvn(031)
  194
- Double Move: Movl(032)
  195
- Double Move Not: Mvnl(033)
  196
- Data Exchange: Xchg(034)
  197
- Double Data Exchange: Xcgl(035)
  198
- Move to Register: Movr(036)
  199
- Move Quick: Movq(037)
  200
- Multiple Bit Transfer: Xfrb(038)
  201
- Block Transfer: Xfer(040)
  203
- Block Set: Bset(041)
  204
- Move Bit: Movb(042)
  205
- Move Digit: Movd(043)
  207
- Single Word Distribute: Dist(044)
  208
- Data Collect: Coll(045)
  209
- Interbank Block Transfer: Bxfr(046)
  210
- Compare: Cmp(020)
  211
- Comparison Instructions
  211
- Double Compare: Cmpl(021)
  213
- Block Compare: Bcmp(022)
  214
- Multiple Compare: Mcmp(024)
  217
- Equal: Equ(025)
  218
- Input Comparison Instructions (300 to 328)
  219
- Signed Binary Compare: Cps(026)
  221
- Double Signed Binary Compare: Cpsl(027)
  222
- Double Unsigned Compare: Cmpl(029)
  223
- Unsigned Compare: Cmp(028)
  223
- Bcd-To-Binary: bin(100)
  225
- Conversion Instructions
  225
- Binary-To-Bcd: Bcd(101)
  226
- Double Bcd-To-Double Binary: Binl(102)
  227
- Double Binary-To-Double Bcd: Bcdl(103)
  228
- 2'S Complement: Neg(104)
  229
- Double 2'S Complement: Negl(105)
  230
- Sign: Sign(106)
  231
- Data Decoder: Mlpx(110)
  232
- Data Encoder: Dmpx(111)
  234
- 7-Segment Decoder: Sdec(112)
  237
- Ascii Convert: Asc(113)
  240
- Bit Counter: Bcnt(114)
  242
- Column to Line: Line(115)
  243
- Line to Column: Colm(116)
  244
- Ascii to Hex: Hex(117)
  245
- Signed Bcd-To-Binary: Bins(275)
  248
- Signed Binary-To-Bcd: Bcds(276)
  250
- Double Signed Bcd-To-Binary: Bisl(277)
  252
- Double Signed Binary-To-Bcd: Bdsl(278)
  254
- BCD Calculation Instructions
  255
- Bcd Add: Add(070)
  256
- Clear Carry: Clc(079)
  256
- Set Carry: Stc(078)
  256
- Bcd Subtract: Sub(071)
  257
- Bcd Multiply: Mul(072)
  259
- Bcd Divide: DIV(073)
  260
- Double Bcd Add: Addl(074)
  261
- Double Bcd Subtract: Subl(075)
  262
- Double Bcd Multiply: Mull(076)
  263
- Double Bcd Divide: Divl(077)
  264
- Binary Add: Adb(080)
  267
- Binary Calculation Instructions
  267
- Binary Subtract: Sbb(081)
  268
- Binary Multiply: Mlb(082)
  270
- Binary Divide: Dvb(083)
  271
- Double Binary Add: Adbl(084)
  272
- Double Binary Subtract: Sbbl(085)
  273
- Double Binary Multiply: Mlbl(086)
  274
- Double Binary Divide: Dvbl(087)
  275
- Binary Addition: +(400)/+L(401)/+C(402)/+CL(403)
  277
- Symbol Math Instructions
  277
- BCD Addition: +B(404)/ +BL(405)/+BC(406)/+BCL(407)
  279
- Binary Subtraction: -(410)/ -L(411)/-C(412)/-CL(413)
  281
- BCD Subtraction: -B(414)/ -BL(415)/-BC(416)/-BCL(417)
  286
- Binary Multiplication: *(420)/ *L(421)/*U(422)/*UL(423)
  290
- BCD Multiplication: *B(424)/ *BL(425)
  292
- Binary Division: /(430)/ /L(431)//U(432)//UL(433)
  294
- BCD Division: /B(434)/ /BL(435)
  296
- Floating-Point Math Instructions
  298
- Floating to 16-Bit: Fix(450)
  301
- Floating to 32-Bit: Fixl(451)
  302
- 16-Bit to Floating: Flt(452)
  303
- 32-Bit to Floating: Fltl(453)
  303
- Floating-Point Add: +F(454)
  304
- Floating-Point Subtract: -F(455)
  305
- Floating-Point Multiply: *F(456)
  306
- Floating-Point Divide: /F(457)
  307
- Degrees to Radians: Rad(458)
  308
- Radians to Degrees: Deg(459)
  309
- Sine: sin(460)
  310
- Cosine: Cos(461)
  311
- Tangent: tan(462)
  312
- Sine to Angle: Asin(463)
  313
- Cosine to Angle: Acos(464)
  314
- Tangent to Angle: Atan(465)
  315
- Square Root: Sqrt(466)
  316
- Exponent: Exp(467)
  317
- Logarithm: Log(468)
  318
- Decrement Bcd: Dec(091)
  319
- Increment Bcd: Inc(090)
  319
- Increment/Decrement Instructions
  319
- Increment Binary: Incb(092)
  320
- Decrement Binary: Decb(093)
  321
- Double Increment Bcd: Incl(094)
  321
- Double Decrement Bcd: Decl(095)
  322
- Double Increment Binary: Inbl(096)
  322
- Double Decrement Binary: Dcbl(097)
  323
- Find Maximum: Max(165)
  324
- Special Math Instructions
  324
- Find Minimum: Min(166)
  325
- Sum: Sum(167)
  327
- Bcd Square Root: Root(140)
  328
- Binary Root: Rotb(274)
  330
- Floating Point Divide: Fdiv(141)
  331
- Arithmetic Process: Apr(142)
  333
- PID and Related Instructions
  335
- Pid Control: Pid(270)
  335
- Limit Control: Lmt(271)
  344
- Dead-Band Control: Band(272)
  345
- Dead-Zone Control: Zone(273)
  346
- Logic Instructions
  348
- Logical And: Andw(130)
  348
- Exclusive Or: Xorw(132)
  349
- Logical Or: Orw(131)
  349
- Exclusive Nor: Xnrw(133)
  350
- Double Logical And: Andl(134)
  351
- Double Exclusive Or: Xorl(136)
  352
- Double Logical Or: Orwl(135)
  352
- Double Exclusive Nor: Xnrl(137)
  353
- Complement: Com(138)
  354
- Double Complement: Coml(139)
  355
- Hours to Seconds: Sec(143)
  355
- Time Instructions
  355
- Seconds to Hours: Hms(144)
  356
- Calendar Add: Cadd(145)
  357
- Calendar Subtract: Csub(146)
  358
- Clock Compensation: Date(179)
  359
- FAILURE/SEVERE FAILURE ALARM: FAL(006) and FALS(007)
  360
- Special Instructions
  360
- Failure Point Detection: Fpd(177)
  362
- Maximum Cycle Time Extend: Wdt(178)
  367
- I/O Display: Iodp(189)
  368
- I/O Refresh: Iorf(184)
  368
- Select Em Bank: Embc(171)
  370
- Data Search: Srch(164)
  371
- Flag/Register Instructions
  372
- Load Flags: Ccl(172)
  372
- Load Register: Regl(175)
  373
- Save Flags: Ccs(173)
  373
- Save Register: Regs(176)
  374
- STEP DEFINE and STEP START: STEP(008)/SNXT
  374
- SUBROUTINE ENTRY and RETURN: SBN(150)/RET(152)
  383
- Subroutines
  383
- Subroutine Call: Sbs(151)
  384
- Macro: Mcro(156)
  386
- Set Stack: Sset(160)
  388
- Stack Instructions
  388
- Push Onto Stack: Push(161)
  389
- Last in First Out: Lifo(162)
  390
- First in First Out: Fifo(163)
  391
- Data Tracing
  392
- Trace Memory Sampling: Trsm(170)
  392
- Mark Trace: Mark(174)
  394
- I/O Read: Read(190)
  395
- Special I/O Instructions
  395
- I/O Read 2: Rd2(280)
  397
- I/O Write: Writ(191)
  399
- I/O Write 2: Wr2(281)
  401
- Disable Access: Iosp(187)
  403
- Network Instructions
  403
- Display Message: Msg(195)
  404
- Enable Access: Iors(188)
  404
- Network Send: Send(192)
  406
- Network Receive: Recv(193)
  408
- Deliver Command: Cmnd(194)
  410
- About Network Instruction Operations
  413
- Block Programming Instructions
  418
- Overview
  418
- Block Program Begin/End: Bprg(250) / Bend<001
  419
- Branching-IF<002>, ELSE<003>, and IEND<004
  420
- One Cycle and Wait: Wait<005
  423
- Conditional Block Exit: Exit<006
  424
- Loop Control-LOOP<009>/LEND<010
  425
- Block Program Pause/Restart : Bpps<011>/Bprs<012
  426
- High-Speed Timer/Timer Wait: Timw<013>/Tmhw<015
  427
- Counter Wait: Cntw<014
  428
Section 6 Program Execution Timing

430
- Initialization
  431
- Program Execution Timing
  431
- PC Operation
  432
- Synchronous Operation in the Duplex System
  432
- I/O Refreshing Limitations
  433
- Memory Card Usage Limitations
  433
- CPU Processing after Power Interruptions
  434
- I/O Refreshing in SYSMAC BUS/2 and SYSMAC BUS Systems
  434
- Power off Operation
  435
- Cycle Time
  436
- Synchronous Operation
  436
- Duplex Initialization
  438
- Example of Error Detection Program
  439
- Switching from Duplex to Simplex Operation
  439
- Operations Significantly Increasing Cycle Time
  440
- Potential Problems with Event Processing
  440
- Calculating Cycle Time
  441
- Instruction Execution Times
  443
- I/O Units Only
  454
- I/O Response Time
  455
- I/O Response Times in a SYSMAC BUS System
  456
- I/O Response Times in a SYSMAC BUS/2 System
  456
- PC Setup
  459
- PC Setup Overview
  459
- PC Setup Details
  461
- PC Setup Default Settings
  464
- Index
  467

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Omron CVM1D Operation Manual

Omron CVM1D Operation Manual (468 pages)

Brand: Omron | Category: Controller | Size: 2.02 MB

Table of Contents

Precautions

1
Section 1 Introduction

7
- Overview
  8
- Relay Circuits: the Roots of PC Logic
  8
- OMRON Product Terminology
  9
- PC Terminology
  9
- Overview of PC Operation
  10
- Operating Modes
  11
- PC Operating Modes
  11
- RUN Output
  12
- Compatible Programming Devices
  13
- Programming Devices
  13
- Connecting Programming Devices
  14
- Recommended Programming Device Operations
  14
- Transferring Programs
  14
- CVM1D Program Memory
  15
- Related Manuals
  15
Section 2 Hardware Considerations

17
Section 3 Memory Areas

31
- Data Area Structure
  33
- Introduction
  33
- CIO (Core I/O) Area
  37
- Holding Area
  37
- I/O Area
  37
- Link Area
  37
- SYSMAC BUS/2 Area
  37
- Work Areas
  37
- Compobus/D Areas
  44
- CPU Bus Unit Area
  44
- SYSMAC BUS Area
  44
- CPU Bus Link Area
  45
- TR (Temporary Relay) Area
  45
- CPU Bus Unit Restart Bits
  52
- Error Log Reset Bit
  52
- Forced Status Hold Bit
  52
- IOM Hold Bit
  52
- Output off Bit
  52
- SSS Flags
  53
- Start-Up Time
  53
- SYSMAC BUS Error Check Bits
  53
- Error Log Area
  54
- Message Flags
  54
- Number of Power Interruptions
  54
- Power Interruption Time
  54
- Service Disable Bits
  54
- CPU Bus Unit Initializing Flags
  56
- Duplex Startup Error Flags
  56
- MACRO Input/Output Areas
  56
- Programming Device Flags
  56
- Wait Flags
  56
- Alternate CPU Unit Status Flags
  57
- CPU Bus Unit Service Interval
  57
- Duplex Verification Error Flags
  57
- Memory Card Flags
  57
- Online I/O Replacement Flags
  58
- Power Supply Unit Off/Error Flags
  58
- CPU Bus Error and Unit Flags
  59
- Cycle Time too Long Flag
  59
- Duplication Error Flag and Duplicate Rack/Cpu Bus Unit Numbers
  59
- Error Code
  59
- FALS Flag
  59
- I/O Bus Error Flag and I/O Bus Error Slot/Rack Numbers
  59
- I/O Setting Error Flag
  59
- Program Error Flag
  59
- Too Many I/O Points Flag
  59
- Battery Low Flags
  60
- CPU Bus Unit Setting Error Flag and Unit Number
  60
- Duplex Bus Error Flag
  60
- Memory Error Flag
  60
- Power Interruption Flag
  60
- SYSMAC BUS Error Flag, Check Bits, and Master/Unit Numbers
  60
- CPU Bus Unit Error Flag and Unit Numbers
  61
- SYSMAC BUS/2 Error Flag and Master/Unit Numbers
  61
- CPU Bus Link Error Flag
  62
- CPU Bus Unit Number Setting Error Flag
  62
- CPU-Recognized Rack Numbers
  62
- Duplex Power Supply Error Flag
  62
- FAL Flag and FAL Number
  62
- I/O Verification Error Flag
  62
- Indirect DM BCD Error Flag
  62
- Jump Error Flag
  62
- Memory Card Start-Up Transfer Error Flag
  62
- Memory Error Area Location
  62
- Arithmetic Flags
  63
- Maximum Cycle Time
  63
- Present Cycle Time
  63
- Clock Pulse Bits
  64
- First Cycle Flag
  64
- Step Flag
  64
- Counter Area
  65
- EM Status Flags
  65
- Network Status Flags
  65
- Timer Area
  65
- DM and EM Areas
  66
- Index and Data Registers (IR and DR)
  68
Section 4 Writing Programs

70
- Basic Procedure
  71
- Instruction Terminology
  71
- Basic Ladder Diagrams
  72
- Basic Terms
  72
- Basic Mnemonic Code
  73
- Ladder Instructions
  74
- OUTPUT and OUTPUT NOT
  76
- Logic Block Instructions
  77
- Mnemonic Code
  77
- The END Instruction
  77
- Branching Instruction Lines
  84
- Coding Multiple Right-Hand Instructions
  84
- TR Bits
  85
- Interlocks
  87
- Jumps
  88
- Controlling Bit Status
  90
- DIFFERENTIATE up and DIFFERENTIATE down
  90
- SET and RESET
  90
- Keep
  91
- Self-Maintaining Bits (Seal)
  91
- Intermediate Instructions
  92
- Work Bits (Internal Relays)
  92
- Programming Precautions
  94
- Data Formats
  95
- Program Execution
  95
- Unsigned Binary Data
  95
- Signed Binary Data
  96
- BCD Data
  99
- Floating-Point Data
  99
- Signed BCD Data
  99
Section 5 Instruction Set

100
- Data Areas, Definers, and Flags
  105
- Instruction Format
  105
- Notation
  105
- Differentiated and Immediate Refresh Instructions
  108
- Coding Right-Hand Instructions
  110
- Ladder Diagram Instructions
  112
- LOAD, LOAD NOT, AND, and NOT, OR, and or NOT
  112
- CONDITION ON/OFF: up(018) and down
  114
- BIT TEST: TST(350) and TSTN
  115
- AND LOAD and or LOAD
  116
- Not: Not(010)
  116
- Bit Control Instructions
  117
- OUTPUT and OUTPUT NOT: out and out NOT
  117
- DIFFERENTIATE UP/DOWN: DIFU(013) and DIFD
  118
- SET and RESET: SET(016) and RSET
  120
- Multiple Bit Set/Reset: Seta(047)/Rsta
  121
- Keep: Keep(011)
  123
- INTERLOCK and INTERLOCK CLEAR: IL(002) and ILC(003
  125
- INTERLOCK and INTERLOCK CLEAR: IL(002) and ILC(003)
  125
- JUMP and JUMP END: JMP(004) and JME(005
  127
- JUMP and JUMP END: JMP(004) and JME(005)
  127
- Conditional Jump: Cjp(221)/Cjpn
  130
- Conditional Jump: Cjp(221)/Cjpn(222)
  130
- End: End(001)
  131
- Operation: Nop(000)
  131
- Timer and Counter Instructions
  132
- Timer: Tim
  134
- High-Speed Timer: Timh(015)
  138
- Accumulative Timer: Ttim(120)
  140
- Long Timer: Timl(121)
  142
- Multi-Output Timer: Mtim(122)
  143
- Counter: Cnt
  145
- Reversible Counter: Cntr(012)
  149
- Reset Timer/Counter: Cnr(236)
  150
- Shift Instructions
  152
- Shift Register: Sft(050)
  152
- Reversible Shift Register: Sftr(051)
  155
- Asynchronous Shift Register: Asft(052)
  156
- Word Shift: Wsft(053)
  158
- Shift N-Bit Data Left: Nsfl(054)
  159
- Shift N-Bit Data Right: Nsfr(055)
  160
- Shift N-Bits Left: Nasl(056)
  161
- Shift N-Bits Right: Nasr(057)
  162
- Double Shift N-Bits Left: Nsll(058)
  163
- Double Shift N-Bits Right: Nsrl(059)
  165
- Arithmetic Shift Left: Asl(060)
  166
- Arithmetic Shift Right: Asr(061)
  167
- Rotate Left: Rol(062)
  168
- Rotate Right: Ror(063)
  169
- Double Shift Left: Asll(064)
  170
- Double Shift Right: Asrl(065)
  171
- Double Rotate Left: Roll(066)
  172
- Rotate Left Without Carry: Rlnc(260)
  173
- Double Rotate Left Without Carry: Rlnl(262)
  174
- Double Rotate Right: Rorl(067)
  175
- Rotate Right Without Carry: Rrnc(261)
  176
- Double Rotate Right W/O Carry: Rrnl(263)
  177
- One Digit Shift Left: Sld(068)
  178
- One Digit Shift Right: Srd(069)
  179
- Data Movement Instructions
  180
- Move: Mov(030)
  180
- Move Not: Mvn(031)
  181
- Double Move: Movl(032)
  182
- Double Move Not: Mvnl(033)
  183
- Data Exchange: Xchg(034)
  184
- Double Data Exchange: Xcgl(035)
  185
- Move to Register: Movr(036)
  186
- Multiple Bit Transfer: Xfrb(038)
  188
- Block Transfer: Xfer(040)
  190
- Block Set: Bset(041)
  191
- Move Bit: Movb(042)
  192
- Move Digit: Movd(043)
  194
- Single Word Distribute: Dist(044)
  195
- Data Collect: Coll(045)
  196
- Interbank Block Transfer: Bxfr(046)
  197
- Compare: Cmp(020)
  198
- Comparison Instructions
  198
- Double Compare: Cmpl(021)
  200
- Block Compare: Bcmp(022)
  201
- Multiple Compare: Mcmp(024)
  204
- Equal: Equ(025)
  205
- Input Comparison Instructions (300 to 328)
  206
- Signed Binary Compare: Cps(026)
  208
- Double Signed Binary Compare: Cpsl(027)
  209
- Double Unsigned Compare: Cmpl(029)
  210
- Unsigned Compare: Cmp(028)
  210
- Bcd-To-Binary: bin(100)
  212
- Conversion Instructions
  212
- Binary-To-Bcd: Bcd(101)
  213
- Double Bcd-To-Double Binary: Binl(102)
  214
- Double Binary-To-Double Bcd: Bcdl(103)
  215
- 2'S Complement: Neg(104)
  216
- Double 2'S Complement: Negl(105)
  217
- Sign: Sign(106)
  218
- Data Decoder: Mlpx(110)
  219
- 7-Segment Decoder: Sdec(112)
  224
- Ascii Convert: Asc(113)
  227
- Bit Counter: Bcnt(114)
  229
- Column to Line: Line(115)
  230
- Line to Column: Colm(116)
  231
- Ascii to Hex: Hex(117)
  232
- Signed Bcd-To-Binary: Bins(275)
  235
- Signed Binary-To-Bcd: Bcds(276)
  237
- Double Signed Bcd-To-Binary: Bisl(277)
  239
- Double Signed Binary-To-Bcd: Bdsl(278)
  241
- BCD Calculation Instructions
  242
- Bcd Add: Add(070)
  243
- Clear Carry: Clc(079)
  243
- Set Carry: Stc(078)
  243
- Bcd Subtract: Sub(071)
  244
- Bcd Multiply: Mul(072)
  246
- Bcd Divide: DIV(073)
  247
- Double Bcd Add: Addl(074)
  248
- Double Bcd Subtract: Subl(075)
  249
- Double Bcd Multiply: Mull(076)
  250
- Double Bcd Divide: Divl(077)
  251
- Binary Add: Adb(080)
  254
- Binary Calculation Instructions
  254
- Binary Subtract: Sbb(081)
  255
- Binary Multiply: Mlb(082)
  257
- Binary Divide: Dvb(083)
  258
- Double Binary Add: Adbl(084)
  259
- Double Binary Subtract: Sbbl(085)
  260
- Double Binary Divide: Dvbl(087)
  262
- Binary Addition: +(400)/+L(401)/+C(402)/+CL(403)
  264
- Symbol Math Instructions
  264
- BCD Addition: +B(404)/ +BL(405)/+BC(406)/+BCL(407)
  266
- Binary Subtraction: -(410)/ -L(411)/-C(412)/-CL(413)
  268
- BCD Subtraction: -B(414)/ -BL(415)/-BC(416)/-BCL(417)
  273
- Binary Multiplication: *(420)/ *L(421)/*U(422)/*UL(423)
  277
- BCD Multiplication: *B(424)/ *BL(425)
  279
- Binary Division: /(430)/ /L(431)//U(432)//UL(433)
  281
- BCD Division: /B(434)/ /BL(435)
  283
- Floating-Point Math Instructions
  285
- Floating to 16-Bit: Fix(450)
  288
- Floating to 32-Bit: Fixl(451)
  289
- 16-Bit to Floating: Flt(452)
  290
- 32-Bit to Floating: Fltl(453)
  290
- Floating-Point Add: +F(454)
  291
- Floating-Point Subtract: -F(455)
  292
- Floating-Point Multiply: *F(456)
  293
- Floating-Point Divide: /F(457)
  294
- Degrees to Radians: Rad(458)
  295
- Radians to Degrees: Deg(459)
  296
- Sine: sin(460)
  297
- Cosine: Cos(461)
  298
- Tangent: tan(462)
  299
- Sine to Angle: Asin(463)
  300
- Cosine to Angle: Acos(464)
  301
- Tangent to Angle: Atan(465)
  302
- Square Root: Sqrt(466)
  303
- Exponent: Exp(467)
  304
- Logarithm: Log(468)
  305
- Decrement Bcd: Dec(091)
  306
- Increment/Decrement Instructions
  306
- Increment Binary: Incb(092)
  307
- Decrement Binary: Decb(093)
  308
- Double Increment Bcd: Incl(094)
  308
- Double Decrement Bcd: Decl(095)
  309
- Double Increment Binary: Inbl(096)
  309
- Double Decrement Binary: Dcbl(097)
  310
- Find Maximum: Max(165)
  311
- Special Math Instructions
  311
- Find Minimum: Min(166)
  312
- Sum: Sum(167)
  314
- Bcd Square Root: Root(140)
  315
- Binary Root: Rotb(274)
  317
- Floating Point Divide: Fdiv(141)
  318
- Arithmetic Process: Apr(142)
  320
- PID and Related Instructions
  322
- Pid Control: Pid(270)
  322
- Limit Control: Lmt(271)
  331
- Dead-Band Control: Band(272)
  332
- Dead-Zone Control: Zone(273)
  333
- Logic Instructions
  335
- Logical And: Andw(130)
  335
- Exclusive Nor: Xnrw(133)
  337
- Double Exclusive Nor: Xnrl(137)
  340
- Complement: Com(138)
  341
- Double Complement: Coml(139)
  342
- Time Instructions
  342
- Seconds to Hours: Hms(144)
  343
- Calendar Add: Cadd(145)
  344
- Calendar Subtract: Csub(146)
  345
- Clock Compensation: Date(179)
  346
- FAILURE/SEVERE FAILURE ALARM: FAL(006) and FALS(007)
  347
- Special Instructions
  347
- Failure Point Detection: Fpd(177)
  349
- Maximum Cycle Time Extend: Wdt(178)
  354
- I/O Display: Iodp(189)
  355
- I/O Refresh: Iorf(184)
  355
- Data Search: Srch(164)
  358
- Flag/Register Instructions
  360
- Load Register: Regl(175)
  360
- Save Flags: Ccs(173)
  360
- Save Register: Regs(176)
  361
- STEP DEFINE and STEP START: STEP(008)/SNXT
  361
- STEP DEFINE and STEP START: STEP(008)/SNXT(009)
  366
- SUBROUTINE ENTRY and RETURN: SBN(150)/RET(152)
  370
- Subroutines
  370
- Subroutine Call: Sbs(151)
  371
- Macro: Mcro(156)
  373
- Set Stack: Sset(160)
  375
- Stack Instructions
  375
- Push Onto Stack: Push(161)
  376
- Last in First Out: Lifo(162)
  377
- First in First Out: Fifo(163)
  378
- Data Tracing
  379
- Trace Memory Sampling: Trsm(170)
  379
- Mark Trace: Mark(174)
  381
- I/O Read: Read(190)
  382
- Special I/O Instructions
  382
- I/O Read 2: Rd2(280)
  384
- I/O Write: Writ(191)
  386
- I/O Write 2: Wr2(281)
  388
- Disable Access: Iosp(187)
  390
- Network Instructions
  390
- Display Message: Msg(195)
  391
- Enable Access: Iors(188)
  391
- Network Send: Send(192)
  393
- Network Receive: Recv(193)
  395
- Deliver Command: Cmnd(194)
  397
- About Network Instruction Operations
  400
- Block Programming Instructions
  405
- Overview
  405
- Block Program Begin/End: Bprg(250) / Bend<001
  406
- Branching-IF<002>, ELSE<003>, and IEND<004
  407
- One Cycle and Wait: Wait<005
  410
- Conditional Block Exit: Exit<006
  411
- Loop Control-LOOP<009>/LEND<010
  412
- Block Program Pause/Restart : Bpps<011>/Bprs<012
  413
- High-Speed Timer/Timer Wait: Timw<013>/Tmhw<015
  414
- Counter Wait: Cntw<014
  415
Section 6 Program Execution Timing

417
- Program Execution Timing
  417
- Initialization
  418
- PC Operation
  418
- Synchronous Operation in the Duplex System
  419
- CPU Processing after Power Interruptions
  420
- I/O Refreshing Limitations
  420
- Memory Card Usage Limitations
  420
- I/O Refreshing in SYSMAC BUS/2 and SYSMAC BUS Systems
  421
- Power off Operation
  421
- Cycle Time
  422
- Synchronous Operation
  423
- Duplex Initialization
  424
- Switching from Duplex to Simplex Operation
  425
- Example of Error Detection Program
  426
- Operations Significantly Increasing Cycle Time
  426
- Calculating Cycle Time
  427
- Potential Problems with Event Processing
  427
- Instruction Execution Times
  429
- I/O Response Time
  441
- I/O Units Only
  441
- I/O Response Times in a SYSMAC BUS System
  442
- I/O Response Times in a SYSMAC BUS/2 System
  443
- PC Setup
  445
- PC Setup Overview
  446
- PC Setup Details
  447
- PC Setup Default Settings
  450
- Index
  452
- Revision History
  461
Table of Contents

467

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